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blorp: Disallow multisampling for BLORP compute blits and copies.

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We don't support typed image writes for multisampling, so we can't
handle multisampled destinations.  We also usually handle MSAA by
running the fragment shader per-sample, which we aren't accounting
for in our compute shaders, so we can't handle MSAA sources either.

We could do both of these things if we really wanted to, but we don't.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524>
This commit is contained in:
Kenneth Graunke
2021-10-04 16:17:18 -07:00
committed by Marge Bot
parent f0744ebef2
commit 574c5d1540
2 changed files with 25 additions and 5 deletions
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4
src/intel/blorp/blorp.h
View File

@@ -186,10 +186,14 @@ blorp_clear_supports_compute(struct blorp_context *blorp,
bool
blorp_copy_supports_compute(struct blorp_context *blorp,
const struct isl_surf *src_surf,
const struct isl_surf *dst_surf,
enum isl_aux_usage dst_aux_usage);
bool
blorp_blit_supports_compute(struct blorp_context *blorp,
const struct isl_surf *src_surf,
const struct isl_surf *dst_surf,
enum isl_aux_usage dst_aux_usage);
void

26
src/intel/blorp/blorp_blit.c
View File

@@ -2434,8 +2434,16 @@ do_blorp_blit(struct blorp_batch *batch,
bool
blorp_blit_supports_compute(struct blorp_context *blorp,
const struct isl_surf *src_surf,
const struct isl_surf *dst_surf,
enum isl_aux_usage dst_aux_usage)
{
/* Our compiler doesn't currently support typed image writes with MSAA.
* Also, our BLORP compute shaders don't handle multisampling cases.
*/
if (dst_surf->samples > 1 || src_surf->samples > 1)
return false;
if (blorp->isl_dev->info->ver >= 12) {
return dst_aux_usage == ISL_AUX_USAGE_GFX12_CCS_E ||
dst_aux_usage == ISL_AUX_USAGE_CCS_E ||
@@ -2467,8 +2475,11 @@ blorp_blit(struct blorp_batch *batch,
blorp_params_init(&params);
params.snapshot_type = INTEL_SNAPSHOT_BLIT;
const bool compute = batch->flags & BLORP_BATCH_USE_COMPUTE;
if (compute)
assert(blorp_blit_supports_compute(batch->blorp, dst_surf->aux_usage));
if (compute) {
assert(blorp_blit_supports_compute(batch->blorp,
src_surf->surf, dst_surf->surf,
dst_surf->aux_usage));
}
/* We cannot handle combined depth and stencil. */
if (src_surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT)
@@ -2775,9 +2786,11 @@ blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
bool
blorp_copy_supports_compute(struct blorp_context *blorp,
const struct isl_surf *src_surf,
const struct isl_surf *dst_surf,
enum isl_aux_usage dst_aux_usage)
{
return blorp_blit_supports_compute(blorp, dst_aux_usage);
return blorp_blit_supports_compute(blorp, src_surf, dst_surf, dst_aux_usage);
}
void
@@ -2800,8 +2813,11 @@ blorp_copy(struct blorp_batch *batch,
params.snapshot_type = INTEL_SNAPSHOT_COPY;
const bool compute = batch->flags & BLORP_BATCH_USE_COMPUTE;
if (compute)
assert(blorp_copy_supports_compute(batch->blorp, dst_surf->aux_usage));
if (compute) {
assert(blorp_copy_supports_compute(batch->blorp,
src_surf->surf, dst_surf->surf,
dst_surf->aux_usage));
}
brw_blorp_surface_info_init(batch, &params.src, src_surf, src_level,
src_layer, ISL_FORMAT_UNSUPPORTED, false);