From 57307df76637cda99889081730a99c0c214c2293 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Fri, 24 May 2024 11:06:09 -0700 Subject: [PATCH] iris: Load 32-bit MMIO PREDICATE register from buffer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We are writing 32-bit register value to buffer and were reading back 64-bit value back into two register. We don't need to read the second register in this case. Signed-off-by: Sagar Ghuge Reviewed-by: Tapani Pälli Part-of: --- src/gallium/drivers/iris/iris_draw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c index e37b7c4b1db..f423b022a10 100644 --- a/src/gallium/drivers/iris/iris_draw.c +++ b/src/gallium/drivers/iris/iris_draw.c @@ -452,7 +452,7 @@ iris_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info *grid) batch->screen->vtbl.update_binder_address(batch, &ice->state.binder); if (ice->state.compute_predicate) { - batch->screen->vtbl.load_register_mem64(batch, MI_PREDICATE_RESULT, + batch->screen->vtbl.load_register_mem32(batch, MI_PREDICATE_RESULT, ice->state.compute_predicate, 0); ice->state.compute_predicate = NULL; }