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radv: adjust ACCUM tessellation fields on GFX11+

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Based on RadeonSI/PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20982>
This commit is contained in:
Samuel Pitoiset
2023-01-30 08:44:17 +01:00
committed by Marge Bot
parent c8a575eb30
commit 56158bd0c0
1 changed files with 2 additions and 2 deletions
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4
src/amd/vulkan/si_cmd_buffer.c
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@@ -511,8 +511,8 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
if (physical_device->rad_info.gfx_level >= GFX11) {
/* ACCUM fields changed their meaning. */
radeon_set_context_reg(cs, R_028B50_VGT_TESS_DISTRIBUTION,
S_028B50_ACCUM_ISOLINE(255) | S_028B50_ACCUM_TRI(255) |
S_028B50_ACCUM_QUAD(255) | S_028B50_DONUT_SPLIT_GFX9(24) |
S_028B50_ACCUM_ISOLINE(128) | S_028B50_ACCUM_TRI(128) |
S_028B50_ACCUM_QUAD(128) | S_028B50_DONUT_SPLIT_GFX9(24) |
S_028B50_TRAP_SPLIT(6));
} else if (physical_device->rad_info.gfx_level >= GFX9) {
radeon_set_context_reg(cs, R_028B50_VGT_TESS_DISTRIBUTION,