intel/compiler: Generalize shader relocations a bit
This commit adds a delta to be added to the relocated value as well as the possibility of multiple types of relocations. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
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@@ -284,10 +284,17 @@ brw_write_shader_relocs(const struct intel_device_info *devinfo,
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{
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{
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for (unsigned i = 0; i < prog_data->num_relocs; i++) {
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for (unsigned i = 0; i < prog_data->num_relocs; i++) {
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assert(prog_data->relocs[i].offset % 8 == 0);
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assert(prog_data->relocs[i].offset % 8 == 0);
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brw_inst *inst = (brw_inst *)(program + prog_data->relocs[i].offset);
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void *dst = program + prog_data->relocs[i].offset;
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for (unsigned j = 0; j < num_values; j++) {
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for (unsigned j = 0; j < num_values; j++) {
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if (prog_data->relocs[i].id == values[j].id) {
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if (prog_data->relocs[i].id == values[j].id) {
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brw_update_reloc_imm(devinfo, inst, values[j].value);
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uint32_t value = values[j].value + prog_data->relocs[i].delta;
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switch (prog_data->relocs[i].type) {
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case BRW_SHADER_RELOC_TYPE_MOV_IMM:
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brw_update_reloc_imm(devinfo, dst, value);
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break;
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default:
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unreachable("Invalid relocation type");
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}
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break;
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break;
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}
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}
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}
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}
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@@ -680,6 +680,11 @@ enum brw_shader_reloc_id {
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BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
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BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
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};
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};
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enum brw_shader_reloc_type {
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/** A MOV instruction with an immediate source */
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BRW_SHADER_RELOC_TYPE_MOV_IMM,
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};
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/** Represents a code relocation
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/** Represents a code relocation
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*
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*
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* Relocatable constants are immediates in the code which we want to be able
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* Relocatable constants are immediates in the code which we want to be able
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@@ -689,12 +694,18 @@ struct brw_shader_reloc {
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/** The 32-bit ID of the relocatable constant */
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/** The 32-bit ID of the relocatable constant */
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uint32_t id;
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uint32_t id;
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/** The offset in the shader to the relocatable instruction
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/** Type of this relocation */
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enum brw_shader_reloc_type type;
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/** The offset in the shader to the relocated value
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*
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*
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* This is the offset to the instruction rather than the immediate value
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* For MOV_IMM relocs, this is an offset to the MOV instruction. This
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* itself. This allows us to do some sanity checking while we relocate.
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* allows us to do some sanity checking while we update the value.
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*/
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*/
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uint32_t offset;
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uint32_t offset;
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/** Value to be added to the relocated value before it is written */
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uint32_t delta;
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};
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};
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/** A value to write to a relocation */
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/** A value to write to a relocation */
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@@ -200,6 +200,9 @@ void brw_realign(struct brw_codegen *p, unsigned align);
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int brw_append_data(struct brw_codegen *p, void *data,
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int brw_append_data(struct brw_codegen *p, void *data,
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unsigned size, unsigned align);
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unsigned size, unsigned align);
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brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
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brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
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void brw_add_reloc(struct brw_codegen *p, uint32_t id,
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enum brw_shader_reloc_type type,
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uint32_t offset, uint32_t delta);
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void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
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void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
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void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
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void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
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@@ -706,6 +706,25 @@ brw_next_insn(struct brw_codegen *p, unsigned opcode)
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return insn;
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return insn;
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}
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}
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void
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brw_add_reloc(struct brw_codegen *p, uint32_t id,
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enum brw_shader_reloc_type type,
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uint32_t offset, uint32_t delta)
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{
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if (p->num_relocs + 1 > p->reloc_array_size) {
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p->reloc_array_size = MAX2(16, p->reloc_array_size * 2);
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p->relocs = reralloc(p->mem_ctx, p->relocs,
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struct brw_shader_reloc, p->reloc_array_size);
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}
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p->relocs[p->num_relocs++] = (struct brw_shader_reloc) {
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.id = id,
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.type = type,
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.offset = offset,
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.delta = delta,
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};
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}
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static brw_inst *
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static brw_inst *
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brw_alu1(struct brw_codegen *p, unsigned opcode,
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brw_alu1(struct brw_codegen *p, unsigned opcode,
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struct brw_reg dest, struct brw_reg src)
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struct brw_reg dest, struct brw_reg src)
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@@ -3690,16 +3709,8 @@ brw_MOV_reloc_imm(struct brw_codegen *p,
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assert(type_sz(src_type) == 4);
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assert(type_sz(src_type) == 4);
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assert(type_sz(dst.type) == 4);
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assert(type_sz(dst.type) == 4);
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if (p->num_relocs + 1 > p->reloc_array_size) {
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brw_add_reloc(p, id, BRW_SHADER_RELOC_TYPE_MOV_IMM,
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p->reloc_array_size = MAX2(16, p->reloc_array_size * 2);
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p->next_insn_offset, 0);
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p->relocs = reralloc(p->mem_ctx, p->relocs,
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struct brw_shader_reloc, p->reloc_array_size);
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}
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p->relocs[p->num_relocs++] = (struct brw_shader_reloc) {
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.id = id,
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.offset = p->next_insn_offset,
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};
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brw_MOV(p, dst, retype(brw_imm_ud(DEFAULT_PATCH_IMM), src_type));
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brw_MOV(p, dst, retype(brw_imm_ud(DEFAULT_PATCH_IMM), src_type));
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}
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}
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