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radv: use explicit VRS mode when configuring PA_CL_VRS_CNTL

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7794>
This commit is contained in:
Samuel Pitoiset
2021-01-19 14:58:59 +01:00
parent ec6d9b7fb2
commit 549f41754a
1 changed files with 1 additions and 1 deletions
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src/amd/vulkan/si_cmd_buffer.c
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@@ -505,7 +505,7 @@ si_emit_graphics(struct radv_device *device,
radeon_set_context_reg(cs, R_028750_SX_PS_DOWNCONVERT_CONTROL, 0xff); radeon_set_context_reg(cs, R_028750_SX_PS_DOWNCONVERT_CONTROL, 0xff);
/* This allows sample shading. */ /* This allows sample shading. */
radeon_set_context_reg(cs, R_028848_PA_CL_VRS_CNTL, radeon_set_context_reg(cs, R_028848_PA_CL_VRS_CNTL,
S_028848_SAMPLE_ITER_COMBINER_MODE(1)); S_028848_SAMPLE_ITER_COMBINER_MODE(V_028848_VRS_COMB_MODE_OVERRIDE));
} }
if (physical_device->rad_info.chip_class == GFX10) { if (physical_device->rad_info.chip_class == GFX10) {