intel/compiler: add new field for storing program size

This will be used by the on disk shader cache.

v2:
 * Set in brw_compile_* rather than brw_codegen_*. (Jason)

Signed-off-by: Timothy Arceri <timothy.arceri@collabora.com>
[jordan.l.justen@intel.com: Only add to brw_stage_prog_data]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Carl Worth
2016-04-14 10:59:16 +10:00
committed by Jordan Justen
parent 1edf0fe612
commit 540636045f
6 changed files with 35 additions and 14 deletions

View File

@@ -1162,6 +1162,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
{
const struct gen_device_info *devinfo = compiler->devinfo;
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL];
const unsigned *assembly;
nir_shader *nir = nir_shader_clone(mem_ctx, src_shader);
nir->info.inputs_read = key->inputs_read;
@@ -1270,7 +1271,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
g.generate_code(v.cfg, 8);
return g.get_assembly(final_assembly_size);
assembly = g.get_assembly(final_assembly_size);
} else {
brw::vec4_tes_visitor v(compiler, log_data, key, prog_data,
nir, mem_ctx, shader_time_index);
@@ -1283,8 +1284,11 @@ brw_compile_tes(const struct brw_compiler *compiler,
if (unlikely(INTEL_DEBUG & DEBUG_TES))
v.dump_instructions();
return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg,
final_assembly_size);
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
&prog_data->base, v.cfg,
final_assembly_size);
}
prog_data->base.base.program_size = *final_assembly_size;
return assembly;
}