iris: blorp using resolve hooks
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@@ -309,7 +309,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
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iris_blorp_surf_for_resource(&dst_surf, info->dst.resource,
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ISL_AUX_USAGE_NONE, true);
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iris_resource_prepare_access(ice, dst_res, info->dst.level, 1,
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iris_resource_prepare_access(ice, dst_res, info->dst.level, 1,
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info->dst.box.z, info->dst.box.depth,
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dst_aux_usage, dst_clear_supported);
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@@ -442,6 +442,30 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
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info->dst.resource);
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}
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static void
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get_copy_region_aux_settings(const struct gen_device_info *devinfo,
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struct iris_resource *res,
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enum isl_aux_usage *out_aux_usage,
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bool *out_clear_supported)
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{
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switch (res->aux.usage) {
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case ISL_AUX_USAGE_MCS:
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case ISL_AUX_USAGE_CCS_E:
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*out_aux_usage = res->aux.usage;
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/* Prior to Gen9, fast-clear only supported 0/1 clear colors. Since
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* we're going to re-interpret the format as an integer format possibly
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* with a different number of components, we can't handle clear colors
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* until Gen9.
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*/
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*out_clear_supported = devinfo->gen >= 9;
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break;
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default:
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*out_aux_usage = ISL_AUX_USAGE_NONE;
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*out_clear_supported = false;
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break;
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}
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}
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/**
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* The pipe->resource_copy_region() driver hook.
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*
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@@ -457,9 +481,27 @@ iris_resource_copy_region(struct pipe_context *ctx,
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unsigned src_level,
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const struct pipe_box *src_box)
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{
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struct iris_screen *screen = (void *) ctx->screen;
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const struct gen_device_info *devinfo = &screen->devinfo;
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struct blorp_batch blorp_batch;
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struct iris_context *ice = (void *) ctx;
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struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
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struct iris_resource *src_res = (void *) src;
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struct iris_resource *dst_res = (void *) dst;
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enum isl_aux_usage src_aux_usage, dst_aux_usage;
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bool src_clear_supported, dst_clear_supported;
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get_copy_region_aux_settings(devinfo, src_res, &src_aux_usage,
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&src_clear_supported);
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get_copy_region_aux_settings(devinfo, dst_res, &dst_aux_usage,
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&dst_clear_supported);
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iris_resource_prepare_access(ice, src_res, src_level, 1,
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src_box->z, src_box->depth,
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src_aux_usage, src_clear_supported);
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iris_resource_prepare_access(ice, dst_res, dst_level, 1,
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dstz, src_box->depth,
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dst_aux_usage, dst_clear_supported);
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blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);
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@@ -478,8 +520,8 @@ iris_resource_copy_region(struct pipe_context *ctx,
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// XXX: what about one surface being a buffer and not the other?
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struct blorp_surf src_surf, dst_surf;
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iris_blorp_surf_for_resource(&src_surf, src, ISL_AUX_USAGE_NONE, false);
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iris_blorp_surf_for_resource(&dst_surf, dst, ISL_AUX_USAGE_NONE, true);
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iris_blorp_surf_for_resource(&src_surf, src, src_aux_usage, false);
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iris_blorp_surf_for_resource(&dst_surf, dst, dst_aux_usage, true);
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for (int slice = 0; slice < src_box->depth; slice++) {
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iris_batch_maybe_flush(batch, 1500);
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@@ -493,6 +535,9 @@ iris_resource_copy_region(struct pipe_context *ctx,
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blorp_batch_finish(&blorp_batch);
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iris_resource_finish_write(ice, dst_res, dst_level, dstz, src_box->depth,
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dst_aux_usage);
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iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *) dst);
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}
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