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ac/llvm: move ac_fixup_ls_hs_input_vgprs to amd common

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To be shared with radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
This commit is contained in:
Qiang Yu
2023-03-20 12:15:02 +08:00
committed by Marge Bot
parent 297f97a42b
commit 531acf548a
3 changed files with 24 additions and 19 deletions
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20
src/amd/llvm/ac_nir_to_llvm.c
View File

@@ -5144,3 +5144,23 @@ bool ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
return true; return true;
} }
/* Fixup the HW not emitting the TCS regs if there are no HS threads. */
void ac_fixup_ls_hs_input_vgprs(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
const struct ac_shader_args *args)
{
LLVMValueRef count = ac_unpack_param(ac, ac_get_arg(ac, args->merged_wave_info), 8, 8);
LLVMValueRef hs_empty = LLVMBuildICmp(ac->builder, LLVMIntEQ, count, ac->i32_0, "");
abi->instance_id =
LLVMBuildSelect(ac->builder, hs_empty, ac_get_arg(ac, args->vertex_id),
abi->instance_id, "");
abi->vs_rel_patch_id =
LLVMBuildSelect(ac->builder, hs_empty, ac_get_arg(ac, args->tcs_rel_ids),
abi->vs_rel_patch_id, "");
abi->vertex_id =
LLVMBuildSelect(ac->builder, hs_empty, ac_get_arg(ac, args->tcs_patch_id),
abi->vertex_id, "");
}

3
src/amd/llvm/ac_nir_to_llvm.h
View File

@@ -50,4 +50,7 @@ static inline unsigned ac_llvm_reg_index_soa(unsigned index, unsigned chan)
bool ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi, bool ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
const struct ac_shader_args *args, struct nir_shader *nir); const struct ac_shader_args *args, struct nir_shader *nir);
void ac_fixup_ls_hs_input_vgprs(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
const struct ac_shader_args *args);
#endif /* AC_NIR_TO_LLVM_H */ #endif /* AC_NIR_TO_LLVM_H */

20
src/amd/vulkan/radv_nir_to_llvm.c
View File

@@ -614,24 +614,6 @@ ac_llvm_finalize_module(struct radv_shader_context *ctx, LLVMPassManagerRef pass
ac_llvm_context_dispose(&ctx->ac); ac_llvm_context_dispose(&ctx->ac);
} }
/* Fixup the HW not emitting the TCS regs if there are no HS threads. */
static void
ac_nir_fixup_ls_hs_input_vgprs(struct radv_shader_context *ctx)
{
LLVMValueRef count =
ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->ac.merged_wave_info), 8, 8);
LLVMValueRef hs_empty = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, count, ctx->ac.i32_0, "");
ctx->abi.instance_id =
LLVMBuildSelect(ctx->ac.builder, hs_empty, ac_get_arg(&ctx->ac, ctx->args->ac.vertex_id),
ctx->abi.instance_id, "");
ctx->abi.vs_rel_patch_id =
LLVMBuildSelect(ctx->ac.builder, hs_empty, ac_get_arg(&ctx->ac, ctx->args->ac.tcs_rel_ids),
ctx->abi.vs_rel_patch_id, "");
ctx->abi.vertex_id =
LLVMBuildSelect(ctx->ac.builder, hs_empty, ac_get_arg(&ctx->ac, ctx->args->ac.tcs_patch_id),
ctx->abi.vertex_id, "");
}
static void static void
prepare_gs_input_vgprs(struct radv_shader_context *ctx, bool merged) prepare_gs_input_vgprs(struct radv_shader_context *ctx, bool merged)
{ {
@@ -748,7 +730,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
if (options->has_ls_vgpr_init_bug && if (options->has_ls_vgpr_init_bug &&
shaders[shader_count - 1]->info.stage == MESA_SHADER_TESS_CTRL) shaders[shader_count - 1]->info.stage == MESA_SHADER_TESS_CTRL)
ac_nir_fixup_ls_hs_input_vgprs(&ctx); ac_fixup_ls_hs_input_vgprs(&ctx.ac, &ctx.abi, &args->ac);
if (is_ngg) { if (is_ngg) {
if (!info->is_ngg_passthrough) if (!info->is_ngg_passthrough)