iris,anv: simplify and inline sampler count calculations
Use the CLAMP macro to clamp the value and simplify the sampler count encoding. Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30922>
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@@ -4948,17 +4948,15 @@ iris_populate_cs_key(const struct iris_context *ice,
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{
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}
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static uint32_t
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static inline uint32_t
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encode_sampler_count(const struct iris_compiled_shader *shader)
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{
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uint32_t count = util_last_bit64(shader->bt.samplers_used_mask);
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uint32_t count_by_4 = DIV_ROUND_UP(count, 4);
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/* We can potentially have way more than 32 samplers and that's ok.
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* However, the 3DSTATE_XS packets only have 3 bits to specify how
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* many to pre-fetch and all values above 4 are marked reserved.
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*/
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return MIN2(count_by_4, 4);
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uint32_t count = util_last_bit64(shader->bt.samplers_used_mask);
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return DIV_ROUND_UP(CLAMP(count, 0, 16), 4);
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}
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#define INIT_THREAD_DISPATCH_FIELDS(pkt, prefix, stage) \
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@@ -1157,16 +1157,14 @@ emit_3dstate_streamout(struct anv_graphics_pipeline *pipeline,
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}
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}
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static uint32_t
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static inline uint32_t
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get_sampler_count(const struct anv_shader_bin *bin)
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{
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uint32_t count_by_4 = DIV_ROUND_UP(bin->bind_map.sampler_count, 4);
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/* We can potentially have way more than 32 samplers and that's ok.
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* However, the 3DSTATE_XS packets only have 3 bits to specify how
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* many to pre-fetch and all values above 4 are marked reserved.
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*/
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return MIN2(count_by_4, 4);
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return DIV_ROUND_UP(CLAMP(bin->bind_map.sampler_count, 0, 16), 4);
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}
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static UNUSED struct anv_address
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