intel/eu: Fix up various type conversions in brw_eu.c that are illegal C++.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
@@ -41,7 +41,7 @@
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/* Returns a conditional modifier that negates the condition. */
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enum brw_conditional_mod
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brw_negate_cmod(uint32_t cmod)
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brw_negate_cmod(enum brw_conditional_mod cmod)
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{
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switch (cmod) {
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case BRW_CONDITIONAL_Z:
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@@ -57,7 +57,7 @@ brw_negate_cmod(uint32_t cmod)
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case BRW_CONDITIONAL_LE:
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return BRW_CONDITIONAL_G;
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default:
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return ~0;
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unreachable("Can't negate this cmod");
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}
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}
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@@ -65,7 +65,7 @@ brw_negate_cmod(uint32_t cmod)
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* src1 in e.g. CMP.
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*/
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enum brw_conditional_mod
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brw_swap_cmod(uint32_t cmod)
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brw_swap_cmod(enum brw_conditional_mod cmod)
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{
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switch (cmod) {
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case BRW_CONDITIONAL_Z:
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@@ -152,7 +152,7 @@ brw_set_default_exec_size(struct brw_codegen *p, unsigned value)
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p->current->exec_size = value;
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}
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void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc )
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void brw_set_default_predicate_control(struct brw_codegen *p, enum brw_predicate pc)
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{
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p->current->predicate = pc;
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}
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@@ -379,7 +379,7 @@ bool brw_try_override_assembly(struct brw_codegen *p, int start_offset,
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p->next_insn_offset = start_offset + sb.st_size;
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p->store_size = (start_offset + sb.st_size) / sizeof(brw_inst);
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p->store = reralloc_size(p->mem_ctx, p->store, p->next_insn_offset);
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p->store = (brw_inst *)reralloc_size(p->mem_ctx, p->store, p->next_insn_offset);
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assert(p->store);
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read(fd, p->store + start_offset, sb.st_size);
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@@ -400,14 +400,14 @@ brw_disassemble(const struct gen_device_info *devinfo,
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bool dump_hex = (INTEL_DEBUG & DEBUG_HEX) != 0;
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for (int offset = start; offset < end;) {
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const brw_inst *insn = assembly + offset;
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const brw_inst *insn = (const brw_inst *)((char *)assembly + offset);
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brw_inst uncompacted;
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bool compacted = brw_inst_cmpt_control(devinfo, insn);
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if (0)
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fprintf(out, "0x%08x: ", offset);
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if (compacted) {
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brw_compact_inst *compacted = (void *)insn;
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brw_compact_inst *compacted = (brw_compact_inst *)insn;
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if (dump_hex) {
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unsigned char * insn_ptr = ((unsigned char *)&insn[0]);
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const unsigned int blank_spaces = 24;
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@@ -150,7 +150,7 @@ void brw_inst_set_group(const struct gen_device_info *devinfo,
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brw_inst *inst, unsigned group);
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void brw_set_default_group(struct brw_codegen *p, unsigned group);
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void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
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void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
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void brw_set_default_predicate_control(struct brw_codegen *p, enum brw_predicate pc);
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void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
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void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
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void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
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@@ -1189,8 +1189,8 @@ brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc)
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void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
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enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
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enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
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enum brw_conditional_mod brw_negate_cmod(enum brw_conditional_mod cmod);
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enum brw_conditional_mod brw_swap_cmod(enum brw_conditional_mod cmod);
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/* brw_eu_compact.c */
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void brw_init_compaction_tables(const struct gen_device_info *devinfo);
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@@ -1208,7 +1208,7 @@ generate_scratch_write(struct brw_codegen *p,
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/* If the instruction is predicated, we'll predicate the send, not
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* the header setup.
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*/
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brw_set_default_predicate_control(p, false);
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brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
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gen6_resolve_implied_move(p, &header, inst->base_mrf);
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@@ -243,7 +243,7 @@ gen_f0_0_MOV_GRF_GRF(struct brw_codegen *p)
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struct brw_reg g2 = brw_vec8_grf(2, 0);
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brw_push_insn_state(p);
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brw_set_default_predicate_control(p, true);
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brw_set_default_predicate_control(p, BRW_PREDICATE_NORMAL);
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brw_MOV(p, g0, g2);
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brw_pop_insn_state(p);
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}
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@@ -259,7 +259,7 @@ gen_f0_1_MOV_GRF_GRF(struct brw_codegen *p)
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struct brw_reg g2 = brw_vec8_grf(2, 0);
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brw_push_insn_state(p);
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brw_set_default_predicate_control(p, true);
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brw_set_default_predicate_control(p, BRW_PREDICATE_NORMAL);
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brw_inst *mov = brw_MOV(p, g0, g2);
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brw_inst_set_flag_subreg_nr(p->devinfo, mov, 1);
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brw_pop_insn_state(p);
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