diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c
index add0d93d7db..91b2bec841e 100644
--- a/src/asahi/compiler/agx_compile.c
+++ b/src/asahi/compiler/agx_compile.c
@@ -2710,7 +2710,6 @@ agx_preprocess_nir(nir_shader *nir, bool support_lod_bias, bool allow_mediump,
 
    NIR_PASS_V(nir, nir_opt_sink, move_all);
    NIR_PASS_V(nir, nir_opt_move, move_all);
-   NIR_PASS_V(nir, agx_nir_lower_ubo);
    NIR_PASS_V(nir, agx_nir_lower_shared_bitsize);
 }
 
diff --git a/src/asahi/compiler/agx_nir_lower_ubo.c b/src/asahi/compiler/agx_nir_lower_ubo.c
deleted file mode 100644
index cc1182ac214..00000000000
--- a/src/asahi/compiler/agx_nir_lower_ubo.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright 2022 Alyssa Rosenzweig
- * SPDX-License-Identifier: MIT
- */
-
-#include <assert.h>
-#include "compiler/nir/nir_builder.h"
-#include "agx_compiler.h"
-#include "agx_internal_formats.h"
-
-static bool
-pass(struct nir_builder *b, nir_instr *instr, UNUSED void *data)
-{
-   if (instr->type != nir_instr_type_intrinsic)
-      return false;
-
-   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
-   if (intr->intrinsic != nir_intrinsic_load_ubo)
-      return false;
-
-   b->cursor = nir_before_instr(instr);
-
-   nir_def *ubo_index = nir_ssa_for_src(b, intr->src[0], 1);
-   nir_def *offset = nir_ssa_for_src(b, *nir_get_io_offset_src(intr), 1);
-   nir_def *address =
-      nir_iadd(b, nir_load_ubo_base_agx(b, ubo_index), nir_u2u64(b, offset));
-   nir_def *value =
-      nir_load_global_constant(b, address, nir_intrinsic_align(intr),
-                               intr->num_components, intr->def.bit_size);
-
-   nir_def_rewrite_uses(&intr->def, value);
-   return true;
-}
-
-bool
-agx_nir_lower_ubo(nir_shader *shader)
-{
-   return nir_shader_instructions_pass(
-      shader, pass, nir_metadata_block_index | nir_metadata_dominance, NULL);
-}
diff --git a/src/asahi/compiler/meson.build b/src/asahi/compiler/meson.build
index 87e9c947a7b..e3e2730e90d 100644
--- a/src/asahi/compiler/meson.build
+++ b/src/asahi/compiler/meson.build
@@ -16,7 +16,6 @@ libasahi_agx_files = files(
   'agx_nir_lower_interpolation.c',
   'agx_nir_lower_load_mask.c',
   'agx_nir_lower_shared_bitsize.c',
-  'agx_nir_lower_ubo.c',
   'agx_nir_opt_preamble.c',
   'agx_lower_64bit.c',
   'agx_lower_parallel_copy.c',
diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py
index b54423452ea..36d3db1309c 100644
--- a/src/compiler/nir/nir_intrinsics.py
+++ b/src/compiler/nir/nir_intrinsics.py
@@ -1734,9 +1734,7 @@ store("agx", [1, 1], [ACCESS, BASE, FORMAT, SIGN_EXTEND])
 # Logical complement of load_front_face, mapping to an AGX system value
 system_value("back_face_agx", 1, bit_sizes=[1, 32])
 
-# Load the base address of an indexed UBO/VBO (for lowering UBOs/VBOs)
-intrinsic("load_ubo_base_agx", src_comp=[1], dest_comp=1, bit_sizes=[64],
-          flags=[CAN_ELIMINATE, CAN_REORDER])
+# Load the base address of an indexed VBO (for lowering VBOs)
 intrinsic("load_vbo_base_agx", src_comp=[1], dest_comp=1, bit_sizes=[64],
           flags=[CAN_ELIMINATE, CAN_REORDER])
 
diff --git a/src/compiler/nir/nir_opt_preamble.c b/src/compiler/nir/nir_opt_preamble.c
index 8a2705f6141..d06ba8158cd 100644
--- a/src/compiler/nir/nir_opt_preamble.c
+++ b/src/compiler/nir/nir_opt_preamble.c
@@ -150,7 +150,6 @@ can_move_intrinsic(nir_intrinsic_instr *instr, opt_preamble_ctx *ctx)
    case nir_intrinsic_load_cull_small_primitives_enabled_amd:
    case nir_intrinsic_load_cull_any_enabled_amd:
    case nir_intrinsic_load_cull_small_prim_precision_amd:
-   case nir_intrinsic_load_ubo_base_agx:
    case nir_intrinsic_load_vbo_base_agx:
       return true;
 
diff --git a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
index 71d063197ef..051e01843e3 100644
--- a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
+++ b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
@@ -81,18 +81,29 @@ load_sysval_indirect(nir_builder *b, unsigned dim, unsigned bitsize,
    }
 }
 
+static nir_def *
+load_ubo(nir_builder *b, nir_intrinsic_instr *intr, void *bases)
+{
+   nir_def *base = load_sysval_indirect(b, 1, 64, AGX_SYSVAL_TABLE_ROOT, bases,
+                                        intr->src[0].ssa);
+
+   nir_def *address = nir_iadd(b, base, nir_u2u64(b, intr->src[1].ssa));
+
+   return nir_load_global_constant(b, address, nir_intrinsic_align(intr),
+                                   intr->num_components, intr->def.bit_size);
+}
+
 static nir_def *
 lower_intrinsic(nir_builder *b, nir_intrinsic_instr *intr)
 {
    struct agx_draw_uniforms *u = NULL;
 
    switch (intr->intrinsic) {
+   case nir_intrinsic_load_ubo:
+      return load_ubo(b, intr, u->ubo_base);
    case nir_intrinsic_load_vbo_base_agx:
       return load_sysval_indirect(b, 1, 64, AGX_SYSVAL_TABLE_ROOT,
                                   &u->vs.vbo_base, intr->src[0].ssa);
-   case nir_intrinsic_load_ubo_base_agx:
-      return load_sysval_indirect(b, 1, 64, AGX_SYSVAL_TABLE_ROOT, u->ubo_base,
-                                  intr->src[0].ssa);
    case nir_intrinsic_load_blend_const_color_r_float:
       return load_sysval_root(b, 1, 32, &u->fs.blend_constant[0]);
    case nir_intrinsic_load_blend_const_color_g_float: