asahi: Identify IOGPU Internal Pipelines structure

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
This commit is contained in:
Alyssa Rosenzweig
2022-02-21 12:22:11 -05:00
committed by Marge Bot
parent eb9da583d7
commit 50f9b4ceba
3 changed files with 40 additions and 9 deletions

View File

@@ -547,6 +547,37 @@
<field name="Percent" start="5:16" size="16" type="uint"/>
</struct>
<struct name="IOGPU Internal Pipelines" size="256">
<field name="Clear pipeline bind" start="0:0" size="32" type="hex"/>
<field name="Clear pipeline unk" start="2:0" size="4" default="4" type="hex"/>
<field name="Clear pipeline" start="2:4" size="28" type="address" modifier="shr(4)"/>
<field name="Store pipeline bind" start="7:0" size="32" type="hex"/>
<field name="Store pipeline unk" start="8:0" size="4" default="4" type="hex"/>
<field name="Store pipeline" start="8:4" size="28" type="address" modifier="shr(4)"/>
<field name="Scissor array" start="10:0" size="64" type="address"/>
<!-- Points to zeroes, allocation of 0xc0000 bytes unknwon type 28000000 -->
<field name="Unknown buffer" start="12:0" size="64" type="address"/>
<field name="Depth pipeline unk" start="16:0" size="4" default="4" type="hex"/>
<!-- 0xc0150 with depth clear and z32f and s8
0x40150 with z32f and s8
0x40 with z32f
0x4000040 with z16?
-->
<field name="Depth pipeline" start="16:4" size="28" type="address" modifier="shr(4)"/>
<field name="Depth unknown 1" start="22:0" size="32" type="hex"/>
<field name="Depth buffer (if clearing)" start="24:0" size="64" type="address"/>
<field name="Depth acceleration buffer (if clearing)" start="30:0" size="64" type="address"/>
<!-- bytes unknown type 888F50 -->
<field name="Depth buffer" start="34:0" size="64" type="address"/>
<!-- 16384 bytes, initialized with 0x7F bytes -->
<field name="Depth acceleration buffer" start="40:0" size="64" type="address"/>
<field name="Stencil buffer" start="44:0" size="64" type="address"/>
<!--- 16384 bytes, initialized with 0x1F bytes -->
<field name="Stencil acceleration buffer" start="50:0" size="64" type="address"/>
<field name="Stencil buffer 2" start="54:0" size="64" type="address"/>
<field name="Stencil acceleration buffer 2" start="60:0" size="64" type="address"/>
</struct>
<struct name="IOGPU Aux Framebuffer" size="32">
<field name="Unk 0" start="0:0" size="32" default="0x4" type="hex"/>
<field name="Unk 1" start="2:0" size="16" default="0xc000" type="hex"/>

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@@ -443,6 +443,7 @@ agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose)
DUMP_UNPACKED(IOGPU_HEADER, cmd, "IOGPU Header\n");
assert(cmd.attachment_offset_1 == cmd.attachment_offset_2);
DUMP_CL(IOGPU_INTERNAL_PIPELINES, ((uint32_t *) cmdbuf->ptr.cpu) + 156, "Internal pipelines");
DUMP_CL(IOGPU_AUX_FRAMEBUFFER, ((uint32_t *) cmdbuf->ptr.cpu) + 220, "Aux Framebuffer");
DUMP_CL(IOGPU_CLEAR_Z_S, ((uint32_t *) cmdbuf->ptr.cpu) + 276, "Clear Z/S");

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@@ -79,15 +79,14 @@ demo_cmdbuf(uint64_t *buf, size_t size,
uint64_t unk_buffer = demo_zero(pool, 0x1000);
uint64_t unk_buffer_2 = demo_zero(pool, 0x8000);
// This is a pipeline bind
map[156] = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
map[158] = pipeline_clear | 0x4;
map[163] = 0x12;
map[164] = pipeline_store | 0x4;
map[166] = scissor_ptr & 0xFFFFFFFF;
map[167] = scissor_ptr >> 32;
map[168] = unk_buffer & 0xFFFFFFFF;
map[169] = unk_buffer >> 32;
agx_pack(map + 156, IOGPU_INTERNAL_PIPELINES, cfg) {
cfg.clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
cfg.clear_pipeline = pipeline_clear;
cfg.store_pipeline_bind = 0x12;
cfg.store_pipeline = pipeline_store;
cfg.scissor_array = scissor_ptr;
cfg.unknown_buffer = unk_buffer;
}
agx_pack(map + 220, IOGPU_AUX_FRAMEBUFFER, cfg) {
cfg.width = width;