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radv: set ENABLE_PING_PONG_BIN_ORDER for GFX11.5

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Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>
This commit is contained in:
Samuel Pitoiset
2023-09-20 12:50:14 +02:00
parent 62a2ed8602
commit 50845f6fa4
1 changed files with 2 additions and 1 deletions
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3
src/amd/vulkan/si_cmd_buffer.c
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@@ -588,7 +588,8 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
}
if (physical_device->rad_info.gfx_level >= GFX11) {
radeon_set_context_reg(cs, R_028C54_PA_SC_BINNER_CNTL_2, 0);
radeon_set_context_reg(cs, R_028C54_PA_SC_BINNER_CNTL_2,
S_028C54_ENABLE_PING_PONG_BIN_ORDER(physical_device->rad_info.gfx_level >= GFX11_5));
uint64_t rb_mask = BITFIELD64_MASK(physical_device->rad_info.max_render_backends);