From 4fdf10fdafe5ef4333afeb478e742c0a24ce3898 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Thu, 22 Sep 2022 14:42:08 +0200 Subject: [PATCH] radeonsi/gfx11: don't set VERTS_PER_SUBGRP to 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It seems slower. Reviewed-by: Marek Olšák Fixes: 25a66477d02 ("radeonsi/gfx11: register changes") Part-of: --- src/gallium/drivers/radeonsi/si_state_draw.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 3442a137101..0a6f2f3bd8f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -1289,7 +1289,7 @@ static void gfx10_emit_ge_cntl(struct si_context *sctx, unsigned num_patches) G_03096C_PRIM_GRP_SIZE_GFX11(si_get_vs_inline(sctx, HAS_TESS, HAS_GS)->current->ge_cntl); ge_cntl = S_03096C_PRIMS_PER_SUBGRP(num_patches) | - S_03096C_VERTS_PER_SUBGRP(0) | + S_03096C_VERTS_PER_SUBGRP(si_get_vs_inline(sctx, HAS_TESS, HAS_GS)->current->ngg.hw_max_esverts) | S_03096C_BREAK_PRIMGRP_AT_EOI(key.u.tess_uses_prim_id) | S_03096C_PRIM_GRP_SIZE_GFX11(prim_grp_size); } else {