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nir,spirv: implement SpvOpImageSparseTexelsResident

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
This commit is contained in:
Rhys Perry
2020-11-25 17:07:20 +00:00
committed by Marge Bot
parent 1fd8b46667
commit 4cbdf9ec4d
4 changed files with 11 additions and 1 deletions
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3
src/compiler/nir/nir_divergence_analysis.c
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@@ -294,7 +294,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_atomic_counter_read:
case nir_intrinsic_atomic_counter_read_deref:
case nir_intrinsic_quad_swizzle_amd:
case nir_intrinsic_masked_swizzle_amd: {
case nir_intrinsic_masked_swizzle_amd:
case nir_intrinsic_is_sparse_texels_resident: {
unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
for (unsigned i = 0; i < num_srcs; i++) {
if (instr->src[i].ssa->divergent) {

3
src/compiler/nir/nir_intrinsics.py
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@@ -288,6 +288,9 @@ intrinsic("deref_mode_is", src_comp=[-1], dest_comp=1,
intrinsic("addr_mode_is", src_comp=[-1], dest_comp=1,
indices=[MEMORY_MODES], flags=[CAN_ELIMINATE, CAN_REORDER])
intrinsic("is_sparse_texels_resident", dest_comp=1, src_comp=[1], bit_sizes=[1],
flags=[CAN_ELIMINATE, CAN_REORDER])
# a barrier is an intrinsic with no inputs/outputs but which can't be moved
# around/optimized in general
def barrier(name):

1
src/compiler/nir/nir_opt_peephole_select.c
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@@ -114,6 +114,7 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count,
case nir_intrinsic_load_subgroup_invocation:
case nir_intrinsic_load_num_subgroups:
case nir_intrinsic_load_frag_shading_rate:
case nir_intrinsic_is_sparse_texels_resident:
if (!alu_ok)
return false;
break;

5
src/compiler/spirv/spirv_to_nir.c
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@@ -2553,6 +2553,10 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
vtn_push_image(b, w[2], si.image, access & ACCESS_NON_UNIFORM);
return;
} else if (opcode == SpvOpImageSparseTexelsResident) {
nir_ssa_def *code = vtn_get_nir_ssa(b, w[3]);
vtn_push_nir_ssa(b, w[2], nir_is_sparse_texels_resident(&b->nb, code));
return;
}
nir_deref_instr *image = NULL, *sampler = NULL;
@@ -5279,6 +5283,7 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
case SpvOpSampledImage:
case SpvOpImage:
case SpvOpImageSparseTexelsResident:
case SpvOpImageSampleImplicitLod:
case SpvOpImageSparseSampleImplicitLod:
case SpvOpImageSampleExplicitLod: