amd: drop support for LLVM 11

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

meson.build

@@ -1643,7 +1643,9 @@ endif
 
 if with_intel_clc
   _llvm_version = '>= 13.0.0'
-elif with_amd_vk or with_gallium_radeonsi or with_gallium_opencl
+elif with_amd_vk or with_gallium_radeonsi
+  _llvm_version = '>= 12.0.0'
+elif with_gallium_opencl
   _llvm_version = '>= 11.0.0'
 elif with_clc
   _llvm_version = '>= 10.0.0'

src/amd/llvm/ac_llvm_util.c

@@ -34,10 +34,6 @@ static void ac_init_llvm_target(void)
       /* error messages prefix */
       "mesa",
       "-amdgpu-atomic-optimizations=true",
-#if LLVM_VERSION_MAJOR == 11
-      /* This fixes variable indexing on LLVM 11. It also breaks atomic.cmpswap on LLVM >= 12. */
-      "-structurizecfg-skip-uniform-regions",
-#endif
    };
 
    ac_reset_llvm_all_options_occurrences();
@@ -148,11 +144,11 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
    case CHIP_NAVI21:
       return "gfx1030";
    case CHIP_NAVI22:
-      return LLVM_VERSION_MAJOR >= 12 ? "gfx1031" : "gfx1030";
+      return "gfx1031";
    case CHIP_NAVI23:
-      return LLVM_VERSION_MAJOR >= 12 ? "gfx1032" : "gfx1030";
+      return "gfx1032";
    case CHIP_VANGOGH:
-      return LLVM_VERSION_MAJOR >= 12 ? "gfx1033" : "gfx1030";
+      return "gfx1033";
    case CHIP_NAVI24:
       return LLVM_VERSION_MAJOR >= 13 ? "gfx1034" : "gfx1030";
    case CHIP_REMBRANDT:

src/amd/llvm/ac_nir_to_llvm.c

@@ -647,7 +647,6 @@ static bool visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
       result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
       break;
    case nir_op_fmulz:
-      assert(LLVM_VERSION_MAJOR >= 12);
       src[0] = ac_to_float(&ctx->ac, src[0]);
       src[1] = ac_to_float(&ctx->ac, src[1]);
       result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.fmul.legacy", ctx->ac.f32,
@@ -845,7 +844,7 @@ static bool visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
                                     src[0], src[1], src[2]);
       break;
    case nir_op_ffmaz:
-      assert(LLVM_VERSION_MAJOR >= 12 && ctx->ac.gfx_level >= GFX10_3);
+      assert(ctx->ac.gfx_level >= GFX10_3);
       src[0] = ac_to_float(&ctx->ac, src[0]);
       src[1] = ac_to_float(&ctx->ac, src[1]);
       src[2] = ac_to_float(&ctx->ac, src[2]);

src/amd/vulkan/radv_shader.c

@@ -108,11 +108,7 @@ get_nir_options_for_stage(struct radv_physical_device *device, gl_shader_stage s
       .has_find_msb_rev = true,
       .has_pack_half_2x16_rtz = true,
       .use_scoped_barrier = true,
-#ifdef LLVM_AVAILABLE
-      .has_fmulz = !device->use_llvm || LLVM_VERSION_MAJOR >= 12,
-#else
       .has_fmulz = true,
-#endif
       .max_unroll_iterations = 32,
       .max_unroll_iterations_aggressive = 128,
       .use_interpolated_input_intrinsics = true,

src/gallium/drivers/radeonsi/si_pipe.c

@@ -1327,8 +1327,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
       sscreen->use_ngg_streamout = false;
       sscreen->use_ngg_culling = sscreen->use_ngg &&
                                  sscreen->info.max_render_backends >= 2 &&
-                                 !(sscreen->debug_flags & DBG(NO_NGG_CULLING)) &&
-                                 LLVM_VERSION_MAJOR >= 12; /* hangs on 11, see #4874 */
+                                 !(sscreen->debug_flags & DBG(NO_NGG_CULLING));
    }
 
    /* Only set this for the cases that are known to work, which are:

src/gallium/drivers/radeonsi/si_shader_nir.c

@@ -185,7 +185,7 @@ static void si_late_optimize_16bit_samplers(struct si_screen *sscreen, nir_shade
     *
     * We only use a16/g16 if all of the affected sources are 16bit.
     */
-   bool has_g16 = sscreen->info.gfx_level >= GFX10 && LLVM_VERSION_MAJOR >= 12;
+   bool has_g16 = sscreen->info.gfx_level >= GFX10;
    struct nir_fold_tex_srcs_options fold_srcs_options[] = {
       {
          .sampler_dims =