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radv/gfx10: implement radv_fill_shader_variant()

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2019-06-25 13:33:03 +02:00
committed by Bas Nieuwenhuizen
parent b144a70ca8
commit 4c82094b7b
1 changed files with 7 additions and 2 deletions
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9
src/amd/vulkan/radv_shader.c
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@@ -539,7 +539,6 @@ static void radv_postprocess_config(const struct radv_physical_device *pdevice,
config_out->float_mode |= V_00B028_FP_64_DENORMS;
config_out->rsrc2 = S_00B12C_USER_SGPR(info->num_user_sgprs) |
S_00B12C_USER_SGPR_MSB_GFX9(info->num_user_sgprs >> 5) |
S_00B12C_SCRATCH_EN(scratch_enabled) |
S_00B12C_SO_BASE0_EN(!!info->info.so.strides[0]) |
S_00B12C_SO_BASE1_EN(!!info->info.so.strides[1]) |
@@ -548,10 +547,16 @@ static void radv_postprocess_config(const struct radv_physical_device *pdevice,
S_00B12C_SO_EN(!!info->info.so.num_outputs);
config_out->rsrc1 = S_00B848_VGPRS((num_vgprs - 1) / 4) |
S_00B848_SGPRS((num_sgprs - 1) / 8) |
S_00B848_DX10_CLAMP(1) |
S_00B848_FLOAT_MODE(config_out->float_mode);
if (pdevice->rad_info.chip_class >= GFX10) {
config_out->rsrc2 |= S_00B22C_USER_SGPR_MSB_GFX10(info->num_user_sgprs >> 5);
} else {
config_out->rsrc1 |= S_00B228_SGPRS((num_sgprs - 1) / 8);
config_out->rsrc2 |= S_00B22C_USER_SGPR_MSB_GFX9(info->num_user_sgprs >> 5);
}
switch (stage) {
case MESA_SHADER_TESS_EVAL:
if (info->tes.as_es) {