radv: implement is_sparse_texels_resident and sparse_residency_code_and
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
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@@ -312,7 +312,7 @@ static void radv_compiler_debug(void *private_data,
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}
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}
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static bool
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static bool
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lower_load_vulkan_descriptor(nir_shader *nir)
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lower_intrinsics(nir_shader *nir)
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{
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{
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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bool progress = false;
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bool progress = false;
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@@ -326,14 +326,20 @@ lower_load_vulkan_descriptor(nir_shader *nir)
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continue;
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic != nir_intrinsic_load_vulkan_descriptor)
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continue;
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b.cursor = nir_before_instr(&intrin->instr);
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b.cursor = nir_before_instr(&intrin->instr);
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nir_ssa_def *def = nir_vec2(&b,
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nir_ssa_def *def = NULL;
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nir_channel(&b, intrin->src[0].ssa, 0),
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if (intrin->intrinsic == nir_intrinsic_load_vulkan_descriptor) {
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nir_imm_int(&b, 0));
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def = nir_vec2(&b, nir_channel(&b, intrin->src[0].ssa, 0),
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nir_imm_int(&b, 0));
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} else if (intrin->intrinsic == nir_intrinsic_is_sparse_texels_resident) {
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def = nir_ieq_imm(&b, intrin->src[0].ssa, 0);
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} else if (intrin->intrinsic == nir_intrinsic_sparse_residency_code_and) {
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def = nir_ior(&b, intrin->src[0].ssa, intrin->src[1].ssa);
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} else {
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continue;
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}
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
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nir_src_for_ssa(def));
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nir_src_for_ssa(def));
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@@ -630,7 +636,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
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nir_var_mem_ubo | nir_var_mem_ssbo,
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nir_var_mem_ubo | nir_var_mem_ssbo,
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nir_address_format_32bit_index_offset);
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nir_address_format_32bit_index_offset);
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NIR_PASS_V(nir, lower_load_vulkan_descriptor);
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NIR_PASS_V(nir, lower_intrinsics);
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/* Lower deref operations for compute shared memory. */
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/* Lower deref operations for compute shared memory. */
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if (nir->info.stage == MESA_SHADER_COMPUTE) {
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if (nir->info.stage == MESA_SHADER_COMPUTE) {
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