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nak: Check that swizzles are none

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wherever we check that src_mod is none.

This commit simply does:
s/src_mod.is_none()/is_unmodified()/
across all of nak except the definition of is_unmodified() itself.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Fixes: bad23ddb48 ("nak: Add F16 and F16v2 sources")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
(cherry picked from commit 9d1c38ddf11202805ac8e281ddd34940f8ad68a6)
This commit is contained in:
Mel Henning
2025-05-02 19:36:06 -04:00
committed by Eric Engestrom
parent 81b877c9a0
commit 4c1447e89b
15 changed files with 79 additions and 86 deletions
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2
.pick_status.json
View File

@@ -94,7 +94,7 @@
"description": "nak: Check that swizzles are none",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "bad23ddb4849908a648d503a615a5a9b15e9768a",
"notes": null

4
src/nouveau/compiler/nak/assign_regs.rs
View File

@@ -965,7 +965,7 @@ impl AssignRegsBlock {
}
fn try_coalesce(&mut self, ssa: SSAValue, src: &Src) -> bool {
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
let SrcRef::Reg(src_reg) = src.src_ref else {
return false;
};
@@ -1018,7 +1018,7 @@ impl AssignRegsBlock {
}
Op::PhiSrcs(phi) => {
for (id, src) in phi.srcs.iter() {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
if let Some(ssa) = src_ssa_ref(src) {
assert!(ssa.comps() == 1);
let reg = self.get_scalar(ssa[0]);

8
src/nouveau/compiler/nak/builder.rs
View File

@@ -145,7 +145,7 @@ pub trait SSABuilder: Builder {
fn shl64(&mut self, x: Src, shift: Src) -> SSARef {
let x = x.as_ssa().unwrap();
debug_assert!(shift.src_mod.is_none());
debug_assert!(shift.is_unmodified());
let dst = self.alloc_ssa(RegFile::GPR, 2);
if self.sm() >= 70 {
@@ -214,7 +214,7 @@ pub trait SSABuilder: Builder {
fn shr64(&mut self, x: Src, shift: Src, signed: bool) -> SSARef {
let x = x.as_ssa().unwrap();
debug_assert!(shift.src_mod.is_none());
debug_assert!(shift.is_unmodified());
let dst = self.alloc_ssa(RegFile::GPR, 2);
self.push_op(OpShf {
@@ -630,8 +630,8 @@ pub trait SSABuilder: Builder {
fn lea64(&mut self, a: Src, b: Src, shift: u8) -> SSARef {
assert!(self.sm() >= 70);
assert!(a.src_mod.is_none());
assert!(b.src_mod.is_none());
assert!(a.is_unmodified());
assert!(b.is_unmodified());
let a = a.as_ssa().unwrap();
let b = b.as_ssa().unwrap();

2
src/nouveau/compiler/nak/const_tracker.rs
View File

@@ -33,7 +33,7 @@ impl ConstTracker {
debug_assert!(dst.comps() == 1);
let dst = dst[0];
debug_assert!(op.src.src_mod.is_none());
debug_assert!(op.src.is_unmodified());
let is_const = match &op.src.src_ref {
SrcRef::Zero | SrcRef::True | SrcRef::False | SrcRef::Imm32(_) => {
true

20
src/nouveau/compiler/nak/ir.rs
View File

@@ -1193,7 +1193,7 @@ impl Src {
_ => panic!("Not a bitwise source modifier"),
},
_ => {
assert!(self.src_mod.is_none());
assert!(self.is_unmodified());
u
}
};
@@ -1206,7 +1206,7 @@ impl Src {
}
pub fn as_ssa(&self) -> Option<&SSARef> {
if self.src_mod.is_none() {
if self.is_unmodified() {
self.src_ref.as_ssa()
} else {
None
@@ -1230,7 +1230,7 @@ impl Src {
}
pub fn as_u32(&self) -> Option<u32> {
if self.src_mod.is_none() {
if self.is_unmodified() {
self.src_ref.as_u32()
} else {
None
@@ -1240,7 +1240,7 @@ impl Src {
pub fn as_imm_not_i20(&self) -> Option<u32> {
match self.src_ref {
SrcRef::Imm32(i) => {
assert!(self.src_mod.is_none());
assert!(self.is_unmodified());
let top = i & 0xfff80000;
if top == 0 || top == 0xfff80000 {
None
@@ -1255,7 +1255,7 @@ impl Src {
pub fn as_imm_not_f20(&self) -> Option<u32> {
match self.src_ref {
SrcRef::Imm32(i) => {
assert!(self.src_mod.is_none());
assert!(self.is_unmodified());
if (i & 0xfff) == 0 {
None
} else {
@@ -1324,14 +1324,14 @@ impl Src {
pub fn supports_type(&self, src_type: &SrcType) -> bool {
match src_type {
SrcType::SSA => {
if !self.src_mod.is_none() {
if !self.is_unmodified() {
return false;
}
matches!(self.src_ref, SrcRef::SSA(_) | SrcRef::Reg(_))
}
SrcType::GPR => {
if !self.src_mod.is_none() {
if !self.is_unmodified() {
return false;
}
@@ -1340,7 +1340,7 @@ impl Src {
SrcRef::Zero | SrcRef::SSA(_) | SrcRef::Reg(_)
)
}
SrcType::ALU => self.src_mod.is_none() && self.src_ref.is_alu(),
SrcType::ALU => self.is_unmodified() && self.src_ref.is_alu(),
SrcType::F16 | SrcType::F32 | SrcType::F64 | SrcType::F16v2 => {
match self.src_mod {
SrcMod::None
@@ -1376,8 +1376,8 @@ impl Src {
self.src_ref.is_predicate()
}
SrcType::Carry => self.src_mod.is_none() && self.src_ref.is_carry(),
SrcType::Bar => self.src_mod.is_none() && self.src_ref.is_barrier(),
SrcType::Carry => self.is_unmodified() && self.src_ref.is_carry(),
SrcType::Bar => self.is_unmodified() && self.src_ref.is_barrier(),
}
}
}

8
src/nouveau/compiler/nak/lower_copy_swap.rs
View File

@@ -24,7 +24,7 @@ impl LowerCopySwap {
fn lower_copy(&mut self, b: &mut impl Builder, copy: OpCopy) {
let dst_reg = copy.dst.as_reg().unwrap();
assert!(dst_reg.comps() == 1);
assert!(copy.src.src_mod.is_none());
assert!(copy.src.is_unmodified());
assert!(copy.src.is_uniform() || !dst_reg.is_uniform());
match dst_reg.file() {
@@ -177,7 +177,7 @@ impl LowerCopySwap {
}
fn lower_r2ur(&mut self, b: &mut impl Builder, r2ur: OpR2UR) {
assert!(r2ur.src.src_mod.is_none());
assert!(r2ur.src.is_unmodified());
if r2ur.src.is_uniform() {
let copy = OpCopy {
dst: r2ur.dst,
@@ -214,9 +214,9 @@ impl LowerCopySwap {
assert!(x.file() == y.file());
assert!(x.file() != RegFile::Mem);
assert!(x.comps() == 1 && y.comps() == 1);
assert!(swap.srcs[0].src_mod.is_none());
assert!(swap.srcs[0].is_unmodified());
assert!(*swap.srcs[0].src_ref.as_reg().unwrap() == y);
assert!(swap.srcs[1].src_mod.is_none());
assert!(swap.srcs[1].is_unmodified());
assert!(*swap.srcs[1].src_ref.as_reg().unwrap() == x);
if x == y {

2
src/nouveau/compiler/nak/lower_par_copies.rs
View File

@@ -110,7 +110,7 @@ fn lower_par_copy(pc: OpParCopy, sm: &dyn ShaderModel) -> MappedInstrs {
}
for (dst_idx, (_, src)) in pc.dsts_srcs.iter().enumerate() {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
let src = src.src_ref;
let src_idx = if let SrcRef::Reg(reg) = src {

2
src/nouveau/compiler/nak/opt_bar_prop.rs
View File

@@ -182,7 +182,7 @@ impl BarPropPass {
}
Op::BMov(op) => {
assert!(!op.clear);
assert!(op.src.src_mod.is_none());
assert!(op.src.is_unmodified());
let dst = op.dst.as_ssa().unwrap();
let src = op.src.as_ssa().unwrap();
assert!(dst.comps() == 1 && src.comps() == 1);

17
src/nouveau/compiler/nak/opt_copy_prop.rs
View File

@@ -195,7 +195,7 @@ impl CopyPropPass {
continue;
};
if entry.src.src_mod.is_none() {
if entry.src.is_unmodified() {
if let SrcRef::SSA(entry_ssa) = entry.src.src_ref {
assert!(entry_ssa.comps() == 1);
*c_ssa = entry_ssa[0];
@@ -208,7 +208,7 @@ impl CopyPropPass {
}
fn prop_to_ssa_src(&self, src: &mut Src) {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
if let SrcRef::SSA(src_ssa) = &mut src.src_ref {
loop {
if !self.prop_to_ssa_ref(src_ssa) {
@@ -274,8 +274,7 @@ impl CopyPropPass {
}
// If there are modifiers, the source types have to match
if !entry.src.src_mod.is_none()
&& entry.src_type != src_type
if !entry.src.is_unmodified() && entry.src_type != src_type
{
return;
}
@@ -394,7 +393,7 @@ impl CopyPropPass {
// source modifiers as needed when propagating the high bits.
let lo_entry_or_none = self.get_copy(&src_ssa[0]);
if let Some(CopyPropEntry::Copy(lo_entry)) = lo_entry_or_none {
if lo_entry.src.src_mod.is_none() {
if lo_entry.src.is_unmodified() {
if let SrcRef::SSA(lo_entry_ssa) = lo_entry.src.src_ref {
src_ssa[0] = lo_entry_ssa[0];
continue;
@@ -404,7 +403,7 @@ impl CopyPropPass {
let hi_entry_or_none = self.get_copy(&src_ssa[1]);
if let Some(CopyPropEntry::Copy(hi_entry)) = hi_entry_or_none {
if hi_entry.src.src_mod.is_none()
if hi_entry.src.is_unmodified()
|| hi_entry.src_type == SrcType::F64
{
if let SrcRef::SSA(hi_entry_ssa) = hi_entry.src.src_ref {
@@ -423,11 +422,11 @@ impl CopyPropPass {
return;
};
if !lo_entry.src.src_mod.is_none() {
if !lo_entry.src.is_unmodified() {
return;
}
if !hi_entry.src.src_mod.is_none()
if !hi_entry.src.is_unmodified()
&& hi_entry.src_type != SrcType::F64
{
return;
@@ -689,7 +688,7 @@ impl CopyPropPass {
}
}
Op::R2UR(r2ur) => {
assert!(r2ur.src.src_mod.is_none());
assert!(r2ur.src.is_unmodified());
if r2ur.src.is_uniform() {
let dst = r2ur.dst.as_ssa().unwrap();
assert!(dst.comps() == 1);

6
src/nouveau/compiler/nak/opt_lop.rs
View File

@@ -18,7 +18,7 @@ struct LopPass {
}
fn src_as_bool(src: &Src) -> Option<bool> {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
match src.src_ref {
SrcRef::Zero | SrcRef::False | SrcRef::Imm32(0) => Some(false),
SrcRef::True | SrcRef::Imm32(u32::MAX) => Some(true),
@@ -104,7 +104,7 @@ impl LopPass {
src_idx: usize,
) {
loop {
assert!(srcs[src_idx].src_mod.is_none());
assert!(srcs[src_idx].is_unmodified());
let ssa = match srcs[src_idx].src_ref {
SrcRef::SSA(vec) => {
assert!(vec.comps() == 1);
@@ -197,7 +197,7 @@ impl LopPass {
self.dedup_srcs(&mut op.op, &op.srcs);
for (i, src) in op.srcs.iter_mut().enumerate() {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
if let Some(b) = src_as_bool(src) {
op.op.fix_src(i, b);

8
src/nouveau/compiler/nak/opt_prmt.rs
View File

@@ -103,8 +103,8 @@ impl PrmtPass {
return;
};
debug_assert!(op.srcs[0].src_mod.is_none());
debug_assert!(op.srcs[1].src_mod.is_none());
debug_assert!(op.srcs[0].is_unmodified());
debug_assert!(op.srcs[1].is_unmodified());
let srcs = [op.srcs[0].src_ref, op.srcs[1].src_ref];
self.ssa_prmt.insert(dst_ssa, PrmtEntry { sel, srcs });
@@ -115,7 +115,7 @@ impl PrmtPass {
}
fn get_prmt_for_src(&self, src: &Src) -> Option<&PrmtEntry> {
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
if let SrcRef::SSA(vec) = &src.src_ref {
debug_assert!(vec.comps() == 1);
self.get_prmt(&vec[0])
@@ -218,7 +218,7 @@ impl PrmtPass {
new_sel[i] = PrmtSelByte::new(srcs.imm_src, byte_idx, false);
} else {
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
let Some(src_idx) = srcs.try_add_src(src.src_ref) else {
return false;
};

48
src/nouveau/compiler/nak/sm50.rs
View File

@@ -266,7 +266,7 @@ impl SM50Encoder<'_> {
}
fn set_reg_src(&mut self, range: Range<usize>, src: Src) {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
self.set_reg_src_ref(range, src.src_ref);
}
@@ -515,7 +515,7 @@ impl SM50Op for OpFAdd {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3858);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c58);
@@ -625,7 +625,7 @@ impl SM50Op for OpFMnMx {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3860);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c60);
@@ -725,7 +725,7 @@ impl SM50Op for OpRro {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3890);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.src.src_mod.is_none());
assert!(self.src.is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c90);
@@ -850,7 +850,7 @@ impl SM50Op for OpFSet {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3000);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4800);
@@ -888,7 +888,7 @@ impl SM50Op for OpFSetP {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x36b0);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4bb0);
@@ -967,7 +967,7 @@ impl SM50Op for OpDAdd {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3870);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c70);
@@ -1066,7 +1066,7 @@ impl SM50Op for OpDMnMx {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3850);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c50);
@@ -1144,7 +1144,7 @@ impl SM50Op for OpDSetP {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3680);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4b80);
@@ -1214,7 +1214,7 @@ impl SM50Op for OpFlo {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3830);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.src.src_mod.is_none());
assert!(self.src.is_unmodified());
}
SrcRef::CBuf(cb) => {
e.set_opcode(0x4c30);
@@ -1249,9 +1249,7 @@ impl SM50Op for OpIAdd2 {
fn encode(&self, e: &mut SM50Encoder<'_>) {
// Hardware requires at least one of these be unmodified. Otherwise, it
// encodes as iadd.po which isn't what we want.
assert!(
self.srcs[0].src_mod.is_none() || self.srcs[1].src_mod.is_none()
);
assert!(self.srcs[0].is_unmodified() || self.srcs[1].is_unmodified());
let carry_out = match self.carry_out {
Dst::Reg(reg) if reg.file() == RegFile::Carry => true,
@@ -1277,7 +1275,7 @@ impl SM50Op for OpIAdd2 {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3810);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c10);
@@ -1333,7 +1331,7 @@ impl SM50Op for OpIAdd2X {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3810);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c10);
@@ -1420,8 +1418,8 @@ impl SM50Op for OpIMul {
}
fn encode(&self, e: &mut SM50Encoder<'_>) {
assert!(self.srcs[0].src_mod.is_none());
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[0].is_unmodified());
assert!(self.srcs[1].is_unmodified());
if let Some(i) = self.srcs[1].as_imm_not_i20() {
e.set_opcode(0x1fc0);
@@ -1475,7 +1473,7 @@ impl SM50Op for OpIMnMx {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3820);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(cb) => {
e.set_opcode(0x4c20);
@@ -1518,7 +1516,7 @@ impl SM50Op for OpISetP {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3660);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(cb) => {
e.set_opcode(0x4b60);
@@ -1593,7 +1591,7 @@ impl SM50Op for OpLop2 {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x3840);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4c40);
@@ -1666,7 +1664,7 @@ impl SM50Op for OpShf {
SrcRef::Imm32(imm32) => {
e.set_opcode(if self.right { 0x38f8 } else { 0x36f8 });
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.shift.src_mod.is_none());
assert!(self.shift.is_unmodified());
}
src => panic!("Invalid shf shift: {src}"),
}
@@ -1775,7 +1773,7 @@ impl SM50Op for OpF2F {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x38a8);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.src.src_mod.is_none());
assert!(self.src.is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4ca8);
@@ -1817,7 +1815,7 @@ impl SM50Op for OpF2I {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x38b0);
e.set_src_imm_f20(20..39, 56, *imm32);
assert!(self.src.src_mod.is_none());
assert!(self.src.is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4cb0);
@@ -1858,7 +1856,7 @@ impl SM50Op for OpI2F {
SrcRef::Imm32(imm32) => {
e.set_opcode(0x38b8);
e.set_src_imm_i20(20..39, 56, *imm32);
assert!(self.src.src_mod.is_none());
assert!(self.src.is_unmodified());
}
SrcRef::CBuf(_) => {
e.set_opcode(0x4cb8);
@@ -2599,7 +2597,7 @@ impl SM50Op for OpLdc {
}
fn encode(&self, e: &mut SM50Encoder<'_>) {
assert!(self.cb.src_mod.is_none());
assert!(self.cb.is_unmodified());
let SrcRef::CBuf(cb) = &self.cb.src_ref else {
panic!("Not a CBuf source");
};

30
src/nouveau/compiler/nak/sm70_encode.rs
View File

@@ -86,7 +86,7 @@ impl SM70Encoder<'_> {
}
fn set_reg_src(&mut self, range: Range<usize>, src: Src) {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
match src.src_ref {
SrcRef::Zero => self.set_reg(range, self.zero_reg(RegFile::GPR)),
SrcRef::Reg(reg) => self.set_reg(range, reg),
@@ -189,7 +189,7 @@ impl SM70Encoder<'_> {
}
fn set_bar_src(&mut self, range: Range<usize>, src: Src) {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
self.set_bar_reg(range, *src.src_ref.as_reg().unwrap());
}
@@ -310,7 +310,7 @@ impl ALUSrc {
}
}
SrcRef::Imm32(i) => {
assert!(src.src_mod.is_none());
assert!(src.is_unmodified());
assert!(src.src_swizzle.is_none());
ALUSrc::Imm32(i)
}
@@ -1113,17 +1113,17 @@ impl SM70Op for OpHFma2 {
b.copy_alu_src_if_not_reg(src1, gpr, SrcType::F16v2);
b.copy_alu_src_if_both_not_reg(src1, src2, gpr, SrcType::F16v2);
if !src1.src_mod.is_none() {
if !src1.is_unmodified() {
b.copy_alu_src_and_lower_fmod(src1, gpr, SrcType::F16v2);
}
if !src2.src_mod.is_none() {
if !src2.is_unmodified() {
b.copy_alu_src_and_lower_fmod(src2, gpr, SrcType::F16v2);
}
}
fn encode(&self, e: &mut SM70Encoder<'_>) {
assert!(self.srcs[1].src_mod.is_none());
assert!(self.srcs[2].src_mod.is_none());
assert!(self.srcs[1].is_unmodified());
assert!(self.srcs[2].is_unmodified());
e.encode_fp16_alu(
0x031,
@@ -1361,7 +1361,7 @@ impl SM70Op for OpIAdd3 {
let [src0, src1, src2] = &mut self.srcs;
swap_srcs_if_not_reg(src0, src1, gpr);
swap_srcs_if_not_reg(src2, src1, gpr);
if !src0.src_mod.is_none() && !src1.src_mod.is_none() {
if !src0.is_unmodified() && !src1.is_unmodified() {
assert!(self.overflow[0].is_none());
assert!(self.overflow[1].is_none());
b.copy_alu_src_and_lower_ineg(src0, gpr, SrcType::I32);
@@ -1376,9 +1376,7 @@ impl SM70Op for OpIAdd3 {
fn encode(&self, e: &mut SM70Encoder<'_>) {
// Hardware requires at least one of these be unmodified
assert!(
self.srcs[0].src_mod.is_none() || self.srcs[1].src_mod.is_none()
);
assert!(self.srcs[0].is_unmodified() || self.srcs[1].is_unmodified());
if self.is_uniform() {
e.encode_ualu(
@@ -1412,7 +1410,7 @@ impl SM70Op for OpIAdd3X {
let [src0, src1, src2] = &mut self.srcs;
swap_srcs_if_not_reg(src0, src1, gpr);
swap_srcs_if_not_reg(src2, src1, gpr);
if !src0.src_mod.is_none() && !src1.src_mod.is_none() {
if !src0.is_unmodified() && !src1.is_unmodified() {
let val = b.alloc_ssa(gpr, 1);
b.push_op(OpIAdd3X {
srcs: [Src::new_zero(), *src0, Src::new_zero()],
@@ -1432,9 +1430,7 @@ impl SM70Op for OpIAdd3X {
fn encode(&self, e: &mut SM70Encoder<'_>) {
// Hardware requires at least one of these be unmodified
assert!(
self.srcs[0].src_mod.is_none() || self.srcs[1].src_mod.is_none()
);
assert!(self.srcs[0].is_unmodified() || self.srcs[1].is_unmodified());
if self.is_uniform() {
e.encode_ualu(
@@ -2148,8 +2144,8 @@ impl SM70Op for OpShfl {
}
fn encode(&self, e: &mut SM70Encoder<'_>) {
assert!(self.lane.src_mod.is_none());
assert!(self.c.src_mod.is_none());
assert!(self.lane.is_unmodified());
assert!(self.c.is_unmodified());
match &self.lane.src_ref {
SrcRef::Zero | SrcRef::Reg(_) => match &self.c.src_ref {

6
src/nouveau/compiler/nak/spill_values.rs
View File

@@ -59,7 +59,7 @@ impl PhiSrcMap {
}
fn add_phi_src(&mut self, phi_idx: u32, src: Src) {
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
let vec = src.src_ref.as_ssa().expect("Not an SSA source");
debug_assert!(vec.comps() == 1);
self.phi_src.insert(phi_idx, vec[0]);
@@ -735,7 +735,7 @@ fn spill_values<S: Spill>(
debug_assert!(dst_vec.comps() == 1);
let dst_ssa = &dst_vec[0];
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
let Some(src_vec) = src.src_ref.as_ssa() else {
continue;
};
@@ -980,7 +980,7 @@ fn spill_values<S: Spill>(
if let Some(phi) = pb.phi_srcs_mut() {
for (idx, src) in phi.srcs.iter_mut() {
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
let vec = src.src_ref.as_ssa().unwrap();
debug_assert!(vec.comps() == 1);
let ssa = &vec[0];

2
src/nouveau/compiler/nak/to_cssa.rs
View File

@@ -352,7 +352,7 @@ impl Function {
for (idx, src) in phi.srcs.iter_mut() {
let (ps, file) = cg.phi_set_file(idx);
debug_assert!(src.src_mod.is_none());
debug_assert!(src.is_unmodified());
if let SrcRef::SSA(vec) = &src.src_ref {
debug_assert!(vec.comps() == 1);
if vec[0].file() == file {