From 4abb911bd2055b33b80bb42833bb6aaa7367f9a4 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Tue, 21 Mar 2023 10:54:16 +0100 Subject: [PATCH] amd/surface: rename metadata functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use more specific verbs to avoid confusion: set -> apply get -> compute Reviewed-by: Marek Olšák Reviewed-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/common/ac_surface.c | 20 ++++++++++---------- src/amd/common/ac_surface.h | 20 ++++++++++---------- src/amd/vulkan/radv_image.c | 12 ++++++------ src/gallium/drivers/radeonsi/si_texture.c | 16 ++++++++-------- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 +++--- 5 files changed, 37 insertions(+), 37 deletions(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 1c8fceccd2f..eff143135a3 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -2637,8 +2637,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split) #define AMDGPU_TILING_DCC_MAX_COMPRESSED_BLOCK_SIZE_MASK 0x3 /* This should be called before ac_compute_surface. */ -void ac_surface_set_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, - uint64_t tiling_flags, enum radeon_surf_mode *mode) +void ac_surface_apply_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, + uint64_t tiling_flags, enum radeon_surf_mode *mode) { bool scanout; @@ -2677,8 +2677,8 @@ void ac_surface_set_bo_metadata(const struct radeon_info *info, struct radeon_su surf->flags &= ~RADEON_SURF_SCANOUT; } -void ac_surface_get_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, - uint64_t *tiling_flags) +void ac_surface_compute_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, + uint64_t *tiling_flags) { *tiling_flags = 0; @@ -2730,9 +2730,9 @@ static uint32_t ac_get_umd_metadata_word1(const struct radeon_info *info) } /* This should be called after ac_compute_surface. */ -bool ac_surface_set_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, - unsigned num_storage_samples, unsigned num_mipmap_levels, - unsigned size_metadata, const uint32_t metadata[64]) +bool ac_surface_apply_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, + unsigned num_storage_samples, unsigned num_mipmap_levels, + unsigned size_metadata, const uint32_t metadata[64]) { const uint32_t *desc = &metadata[2]; uint64_t offset; @@ -2822,9 +2822,9 @@ bool ac_surface_set_umd_metadata(const struct radeon_info *info, struct radeon_s return true; } -void ac_surface_get_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, - unsigned num_mipmap_levels, uint32_t desc[8], - unsigned *size_metadata, uint32_t metadata[64]) +void ac_surface_compute_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, + unsigned num_mipmap_levels, uint32_t desc[8], + unsigned *size_metadata, uint32_t metadata[64]) { /* Clear the base address and set the relative DCC offset. */ desc[0] = 0; diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 7be9a92dbd2..164695f464b 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -441,17 +441,17 @@ int ac_compute_surface(struct ac_addrlib *addrlib, const struct radeon_info *inf struct radeon_surf *surf); void ac_surface_zero_dcc_fields(struct radeon_surf *surf); -void ac_surface_set_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, - uint64_t tiling_flags, enum radeon_surf_mode *mode); -void ac_surface_get_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, - uint64_t *tiling_flags); +void ac_surface_apply_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, + uint64_t tiling_flags, enum radeon_surf_mode *mode); +void ac_surface_compute_bo_metadata(const struct radeon_info *info, struct radeon_surf *surf, + uint64_t *tiling_flags); -bool ac_surface_set_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, - unsigned num_storage_samples, unsigned num_mipmap_levels, - unsigned size_metadata, const uint32_t metadata[64]); -void ac_surface_get_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, - unsigned num_mipmap_levels, uint32_t desc[8], - unsigned *size_metadata, uint32_t metadata[64]); +bool ac_surface_apply_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, + unsigned num_storage_samples, unsigned num_mipmap_levels, + unsigned size_metadata, const uint32_t metadata[64]); +void ac_surface_compute_umd_metadata(const struct radeon_info *info, struct radeon_surf *surf, + unsigned num_mipmap_levels, uint32_t desc[8], + unsigned *size_metadata, uint32_t metadata[64]); bool ac_surface_override_offset_stride(const struct radeon_info *info, struct radeon_surf *surf, unsigned num_mipmap_levels, uint64_t offset, unsigned pitch); diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index d35553b8b62..ec3e99f0c13 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1441,8 +1441,8 @@ radv_query_opaque_metadata(struct radv_device *device, struct radv_image *image, 0, image->planes[0].surface.blk_w, false, false, false, false, desc, NULL); - ac_surface_get_umd_metadata(&device->physical_device->rad_info, &image->planes[0].surface, - image->info.levels, desc, &md->size_metadata, md->metadata); + ac_surface_compute_umd_metadata(&device->physical_device->rad_info, &image->planes[0].surface, + image->info.levels, desc, &md->size_metadata, md->metadata); } void @@ -1751,10 +1751,10 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in } if (create_info.bo_metadata && !mod_info && - !ac_surface_set_umd_metadata(&device->physical_device->rad_info, - &image->planes[plane].surface, image_info.storage_samples, - image_info.levels, create_info.bo_metadata->size_metadata, - create_info.bo_metadata->metadata)) + !ac_surface_apply_umd_metadata(&device->physical_device->rad_info, + &image->planes[plane].surface, image_info.storage_samples, + image_info.levels, create_info.bo_metadata->size_metadata, + create_info.bo_metadata->metadata)) return VK_ERROR_INVALID_EXTERNAL_HANDLE; if (!create_info.no_metadata_planes && !create_info.bo_metadata && plane_count == 1 && diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 43ac610e747..b3205535110 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -553,9 +553,9 @@ static void si_set_tex_bo_metadata(struct si_screen *sscreen, struct si_texture si_set_mutable_tex_desc_fields(sscreen, tex, &tex->surface.u.legacy.level[0], 0, 0, tex->surface.blk_w, false, 0, desc); - ac_surface_get_umd_metadata(&sscreen->info, &tex->surface, - tex->buffer.b.b.last_level + 1, - desc, &md.size_metadata, md.metadata); + ac_surface_compute_umd_metadata(&sscreen->info, &tex->surface, + tex->buffer.b.b.last_level + 1, + desc, &md.size_metadata, md.metadata); sscreen->ws->buffer_set_metadata(sscreen->ws, tex->buffer.buf, &md, &tex->surface); } @@ -1628,11 +1628,11 @@ static struct pipe_resource *si_texture_from_winsys_buffer(struct si_screen *ssc return NULL; } - if (!ac_surface_set_umd_metadata(&sscreen->info, &tex->surface, - tex->buffer.b.b.nr_storage_samples, - tex->buffer.b.b.last_level + 1, - metadata.size_metadata, - metadata.metadata)) { + if (!ac_surface_apply_umd_metadata(&sscreen->info, &tex->surface, + tex->buffer.b.b.nr_storage_samples, + tex->buffer.b.b.last_level + 1, + metadata.size_metadata, + metadata.metadata)) { si_texture_reference(&tex, NULL); return NULL; } diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index d39ef610ed6..55b44eea8ed 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -1312,8 +1312,8 @@ static void amdgpu_buffer_get_metadata(struct radeon_winsys *rws, if (r) return; - ac_surface_set_bo_metadata(&ws->info, surf, info.metadata.tiling_info, - &md->mode); + ac_surface_apply_bo_metadata(&ws->info, surf, info.metadata.tiling_info, + &md->mode); md->size_metadata = info.metadata.size_metadata; memcpy(md->metadata, info.metadata.umd_metadata, sizeof(md->metadata)); @@ -1330,7 +1330,7 @@ static void amdgpu_buffer_set_metadata(struct radeon_winsys *rws, assert(bo->bo && "must not be called for slab entries"); - ac_surface_get_bo_metadata(&ws->info, surf, &metadata.tiling_info); + ac_surface_compute_bo_metadata(&ws->info, surf, &metadata.tiling_info); metadata.size_metadata = md->size_metadata; memcpy(metadata.umd_metadata, md->metadata, sizeof(md->metadata));