anv: Generalize emit_urb_setup
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
@@ -52,6 +52,12 @@ void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer);
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void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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VkShaderStageFlags active_stages,
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unsigned vs_entry_size, unsigned gs_entry_size,
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const struct gen_l3_config *l3_config);
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VkResult
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genX(graphics_pipeline_create)(VkDevice _device,
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struct anv_pipeline_cache *cache,
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@@ -21,6 +21,7 @@
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* IN THE SOFTWARE.
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*/
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#include "common/gen_l3_config.h"
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#include "vk_format_info.h"
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#include "genX_multisample.h"
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@@ -187,18 +188,19 @@ emit_vertex_input(struct anv_pipeline *pipeline,
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#endif
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}
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static inline void
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emit_urb_setup(struct anv_pipeline *pipeline)
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void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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VkShaderStageFlags active_stages,
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unsigned vs_size, unsigned gs_size,
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const struct gen_l3_config *l3_config)
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{
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struct anv_device *device = pipeline->device;
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if (!(active_stages & VK_SHADER_STAGE_VERTEX_BIT))
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vs_size = 1;
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if (!(active_stages & VK_SHADER_STAGE_GEOMETRY_BIT))
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gs_size = 1;
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bool vs_present = pipeline->active_stages & VK_SHADER_STAGE_VERTEX_BIT;
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unsigned vs_size = vs_present ?
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get_vs_prog_data(pipeline)->base.urb_entry_size : 1;
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unsigned vs_entry_size_bytes = vs_size * 64;
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bool gs_present = pipeline->active_stages & VK_SHADER_STAGE_GEOMETRY_BIT;
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unsigned gs_size = gs_present ?
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get_gs_prog_data(pipeline)->base.urb_entry_size : 1;
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unsigned gs_entry_size_bytes = gs_size * 64;
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/* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS):
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@@ -215,14 +217,16 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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unsigned chunk_size_bytes = 8192;
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/* Determine the size of the URB in chunks. */
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unsigned urb_chunks = pipeline->urb.total_size * 1024 / chunk_size_bytes;
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const unsigned total_urb_size =
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gen_get_l3_config_urb_size(&device->info, l3_config);
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const unsigned urb_chunks = total_urb_size * 1024 / chunk_size_bytes;
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/* Reserve space for push constants */
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unsigned push_constant_kb;
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if (pipeline->device->info.gen >= 8)
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if (device->info.gen >= 8)
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push_constant_kb = 32;
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else if (pipeline->device->info.is_haswell)
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push_constant_kb = pipeline->device->info.gt == 3 ? 32 : 16;
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else if (device->info.is_haswell)
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push_constant_kb = device->info.gt == 3 ? 32 : 16;
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else
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push_constant_kb = 16;
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@@ -245,7 +249,7 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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unsigned gs_chunks = 0;
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unsigned gs_wants = 0;
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if (gs_present) {
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if (active_stages & VK_SHADER_STAGE_GEOMETRY_BIT) {
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/* There are two constraints on the minimum amount of URB space we can
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* allocate:
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*
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@@ -303,7 +307,7 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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* of entries needed for each stage.
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*/
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assert(nr_vs_entries >= device->info.urb.min_vs_entries);
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if (gs_present)
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if (active_stages & VK_SHADER_STAGE_GEOMETRY_BIT)
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assert(nr_gs_entries >= 2);
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#if GEN_GEN == 7 && !GEN_IS_HASWELL
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@@ -315,7 +319,7 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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* 3DSTATE_SAMPLER_STATE_POINTER_VS command. Only one PIPE_CONTROL
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* needs to be sent before any combination of VS associated 3DSTATE."
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*/
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anv_batch_emit(&pipeline->batch, GEN7_PIPE_CONTROL, pc) {
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anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) {
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pc.DepthStallEnable = true;
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pc.PostSyncOperation = WriteImmediateData;
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pc.Address = (struct anv_address) { &device->workaround_bo, 0 };
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@@ -327,27 +331,42 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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* - VS
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* - GS
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*/
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_VS), urb) {
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anv_batch_emit(batch, GENX(3DSTATE_URB_VS), urb) {
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urb.VSURBStartingAddress = push_constant_chunks;
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urb.VSURBEntryAllocationSize = vs_size - 1;
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urb.VSNumberofURBEntries = nr_vs_entries;
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}
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_HS), urb) {
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anv_batch_emit(batch, GENX(3DSTATE_URB_HS), urb) {
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urb.HSURBStartingAddress = push_constant_chunks;
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}
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_DS), urb) {
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anv_batch_emit(batch, GENX(3DSTATE_URB_DS), urb) {
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urb.DSURBStartingAddress = push_constant_chunks;
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}
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anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_GS), urb) {
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anv_batch_emit(batch, GENX(3DSTATE_URB_GS), urb) {
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urb.GSURBStartingAddress = push_constant_chunks + vs_chunks;
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urb.GSURBEntryAllocationSize = gs_size - 1;
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urb.GSNumberofURBEntries = nr_gs_entries;
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}
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}
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static inline void
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emit_urb_setup(struct anv_pipeline *pipeline)
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{
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unsigned vs_entry_size =
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(pipeline->active_stages & VK_SHADER_STAGE_VERTEX_BIT) ?
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get_vs_prog_data(pipeline)->base.urb_entry_size : 0;
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unsigned gs_entry_size =
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(pipeline->active_stages & VK_SHADER_STAGE_GEOMETRY_BIT) ?
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get_gs_prog_data(pipeline)->base.urb_entry_size : 0;
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genX(emit_urb_setup)(pipeline->device, &pipeline->batch,
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pipeline->active_stages, vs_entry_size, gs_entry_size,
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pipeline->urb.l3_config);
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}
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static void
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emit_3dstate_sbe(struct anv_pipeline *pipeline)
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{
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