diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c index 1a6920923ef..7c7a0737167 100644 --- a/src/freedreno/ir3/ir3_compiler.c +++ b/src/freedreno/ir3/ir3_compiler.c @@ -143,7 +143,7 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id, compiler->dev = dev; compiler->dev_id = dev_id; compiler->gen = fd_dev_gen(dev_id); - compiler->robust_buffer_access2 = options->robust_buffer_access2; + compiler->options = *options; /* All known GPU's have 32k local memory (aka shared) */ compiler->local_mem_size = 32 * 1024; @@ -264,8 +264,6 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id, compiler->bool_type = (compiler->gen >= 5) ? TYPE_U16 : TYPE_U32; compiler->has_shared_regfile = compiler->gen >= 5; - compiler->push_ubo_with_preamble = options->push_ubo_with_preamble; - /* The driver can't request this unless preambles are supported. */ if (options->push_ubo_with_preamble) assert(compiler->has_preamble); diff --git a/src/freedreno/ir3/ir3_compiler.h b/src/freedreno/ir3/ir3_compiler.h index 99fb811aee9..baa405f5d99 100644 --- a/src/freedreno/ir3/ir3_compiler.h +++ b/src/freedreno/ir3/ir3_compiler.h @@ -38,6 +38,25 @@ struct ir3_ra_reg_set; struct ir3_shader; +struct ir3_compiler_options { + /* If true, UBO/SSBO accesses are assumed to be bounds-checked as defined by + * VK_EXT_robustness2 and optimizations may have to be more conservative. + */ + bool robust_buffer_access2; + + /* If true, promote UBOs (except for constant data) to constants using ldc.k + * in the preamble. The driver should ignore everything in ubo_state except + * for the constant data UBO, which is excluded because the command pushing + * constants for it can be pre-baked when compiling the shader. + */ + bool push_ubo_with_preamble; + + /* If true, disable the shader cache. The driver is then responsible for + * caching. + */ + bool disable_cache; +}; + struct ir3_compiler { struct fd_device *dev; const struct fd_dev_id *dev_id; @@ -48,7 +67,11 @@ struct ir3_compiler { struct nir_shader_compiler_options nir_options; - bool robust_buffer_access2; + /* + * Configuration options for things handled differently by turnip vs + * gallium + */ + struct ir3_compiler_options options; /* * Configuration options for things that are handled differently on @@ -183,8 +206,6 @@ struct ir3_compiler { /* True if preamble instructions (shps, shpe, etc.) are supported */ bool has_preamble; - bool push_ubo_with_preamble; - /* Where the shared consts start in constants file, in vec4's. */ uint16_t shared_consts_base_offset; @@ -201,25 +222,6 @@ struct ir3_compiler { uint64_t geom_shared_consts_size_quirk; }; -struct ir3_compiler_options { - /* If true, UBO/SSBO accesses are assumed to be bounds-checked as defined by - * VK_EXT_robustness2 and optimizations may have to be more conservative. - */ - bool robust_buffer_access2; - - /* If true, promote UBOs (except for constant data) to constants using ldc.k - * in the preamble. The driver should ignore everything in ubo_state except - * for the constant data UBO, which is excluded because the command pushing - * constants for it can be pre-baked when compiling the shader. - */ - bool push_ubo_with_preamble; - - /* If true, disable the shader cache. The driver is then responsible for - * caching. - */ - bool disable_cache; -}; - void ir3_compiler_destroy(struct ir3_compiler *compiler); struct ir3_compiler *ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id, diff --git a/src/freedreno/ir3/ir3_disk_cache.c b/src/freedreno/ir3/ir3_disk_cache.c index 32accbcf422..ff73b37a0db 100644 --- a/src/freedreno/ir3/ir3_disk_cache.c +++ b/src/freedreno/ir3/ir3_disk_cache.c @@ -63,7 +63,7 @@ ir3_disk_cache_init(struct ir3_compiler *compiler) _mesa_sha1_format(timestamp, id_sha1); uint64_t driver_flags = ir3_shader_debug; - if (compiler->robust_buffer_access2) + if (compiler->options.robust_buffer_access2) driver_flags |= IR3_DBG_ROBUST_UBO_ACCESS; compiler->disk_cache = disk_cache_create(renderer, timestamp, driver_flags); } diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c index 54f2ce0733f..1830fd2ce13 100644 --- a/src/freedreno/ir3/ir3_nir.c +++ b/src/freedreno/ir3/ir3_nir.c @@ -146,7 +146,8 @@ ir3_optimize_loop(struct ir3_compiler *compiler, nir_shader *s) nir_load_store_vectorize_options vectorize_opts = { .modes = nir_var_mem_ubo | nir_var_mem_ssbo, .callback = ir3_nir_should_vectorize_mem, - .robust_modes = compiler->robust_buffer_access2 ? nir_var_mem_ubo | nir_var_mem_ssbo: 0, + .robust_modes = compiler->options.robust_buffer_access2 ? + nir_var_mem_ubo | nir_var_mem_ssbo : 0, }; progress |= OPT(s, nir_opt_load_store_vectorize, &vectorize_opts); diff --git a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c index 637995778f7..d9fbef967e1 100644 --- a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c +++ b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c @@ -426,7 +426,7 @@ ir3_nir_analyze_ubo_ranges(nir_shader *nir, struct ir3_shader_variant *v) memset(state, 0, sizeof(*state)); uint32_t upload_remaining = max_upload; - bool push_ubos = compiler->push_ubo_with_preamble; + bool push_ubos = compiler->options.push_ubo_with_preamble; nir_foreach_function (function, nir) { if (function->impl && (!push_ubos || !function->is_preamble)) { nir_foreach_block (block, function->impl) { @@ -475,7 +475,7 @@ ir3_nir_lower_ubo_loads(nir_shader *nir, struct ir3_shader_variant *v) int num_ubos = 0; bool progress = false; bool has_preamble = false; - bool push_ubos = compiler->push_ubo_with_preamble; + bool push_ubos = compiler->options.push_ubo_with_preamble; nir_foreach_function (function, nir) { if (function->impl) { if (function->is_preamble && push_ubos) { diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index 9121f614968..58333b70637 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -2806,8 +2806,8 @@ tu_hash_stage(struct mesa_sha1 *ctx, static void tu_hash_compiler(struct mesa_sha1 *ctx, const struct ir3_compiler *compiler) { - _mesa_sha1_update(ctx, &compiler->robust_buffer_access2, - sizeof(compiler->robust_buffer_access2)); + _mesa_sha1_update(ctx, &compiler->options.robust_buffer_access2, + sizeof(compiler->options.robust_buffer_access2)); _mesa_sha1_update(ctx, &ir3_shader_debug, sizeof(ir3_shader_debug)); }