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radv/llvm: reduce the ESGS itemsize by using NIR IO assigned locations

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There is no longer gaps in the ESGS ring.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
This commit is contained in:
Samuel Pitoiset
2020-10-02 13:21:18 +02:00
parent 569b894835
commit 47e26bf334
3 changed files with 11 additions and 34 deletions
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15
src/amd/vulkan/radv_pipeline.c
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@@ -2677,8 +2677,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_pass(nir[MESA_SHADER_FRAGMENT],
pipeline->layout,
&keys[MESA_SHADER_FRAGMENT],
&infos[MESA_SHADER_FRAGMENT],
radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_FRAGMENT));
&infos[MESA_SHADER_FRAGMENT]);
/* TODO: These are no longer used as keys we should refactor this */
keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id =
@@ -2729,8 +2728,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
for (int i = 0; i < 2; i++) {
radv_nir_shader_info_pass(combined_nir[i],
pipeline->layout, &key,
&infos[MESA_SHADER_TESS_CTRL],
radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_TESS_CTRL));
&infos[MESA_SHADER_TESS_CTRL]);
}
keys[MESA_SHADER_TESS_EVAL].tes.num_patches =
@@ -2753,8 +2751,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_pass(combined_nir[i],
pipeline->layout,
&keys[pre_stage],
&infos[MESA_SHADER_GEOMETRY],
radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_GEOMETRY));
&infos[MESA_SHADER_GEOMETRY]);
}
filled_stages |= (1 << pre_stage);
@@ -2779,8 +2776,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_init(&infos[i]);
radv_nir_shader_info_pass(nir[i], pipeline->layout,
&keys[i], &infos[i],
radv_use_llvm_for_stage(pipeline->device, i));
&keys[i], &infos[i]);
}
for (int i = 0; i < MESA_SHADER_STAGES; i++) {
@@ -3047,8 +3043,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
radv_nir_shader_info_pass(nir[MESA_SHADER_GEOMETRY],
pipeline->layout, &key,
&info,
radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_GEOMETRY));
&info);
info.wave_size = 64; /* Wave32 not supported. */
info.ballot_bit_size = 64;