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radv: don't submit 0 length on UVD either.

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The kernel checks for UVD msgs and if there aren't any gets upset,
so don't submit 0 length on UVD rings either to avoid that.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
This commit is contained in:
Dave Airlie
2024-01-22 12:16:54 +10:00
committed by Marge Bot
parent df9bc11589
commit 47c725b53e
2 changed files with 13 additions and 2 deletions
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3
src/amd/vulkan/radv_queue.c
View File

@@ -1647,7 +1647,8 @@ radv_queue_submit_normal(struct radv_queue *queue, struct vk_queue_submit *submi
queue->device->ws->cs_unchain(cmd_buffer->cs);
if (!chainable || !queue->device->ws->cs_chain(chainable, cmd_buffer->cs, queue->state.uses_shadow_regs)) {
/* don't submit empty command buffers to the kernel. */
if (radv_queue_ring(queue) != AMD_IP_VCN_ENC || cmd_buffer->cs->cdw != 0)
if ((radv_queue_ring(queue) != AMD_IP_VCN_ENC && radv_queue_ring(queue) != AMD_IP_UVD) ||
cmd_buffer->cs->cdw != 0)
cs_array[num_submitted_cs++] = cmd_buffer->cs;
}

12
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
View File

@@ -457,7 +457,17 @@ radv_amdgpu_cs_finalize(struct radeon_cmdbuf *_cs)
*cs->ib_size_ptr |= cs->base.cdw;
} else {
/* Pad the CS with NOP packets. */
if (ip_type != AMDGPU_HW_IP_VCN_ENC) {
bool pad = true;
/* Don't pad on VCN encode/unified as no NOPs */
if (ip_type == AMDGPU_HW_IP_VCN_ENC)
pad = false;
/* Don't add padding to 0 length UVD due to kernel */
if (ip_type == AMDGPU_HW_IP_UVD && cs->base.cdw == 0)
pad = false;
if (pad) {
while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask))
radeon_emit_unchecked(&cs->base, nop_packet);
}