radeonsi: use the ac helper for index buffer stores in the culling shader
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@@ -1194,16 +1194,17 @@ ac_build_buffer_store_format(struct ac_llvm_context *ctx,
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LLVMValueRef voffset,
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LLVMValueRef voffset,
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unsigned num_channels,
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unsigned num_channels,
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bool glc,
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bool glc,
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bool slc,
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bool writeonly_memory)
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bool writeonly_memory)
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{
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{
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if (HAVE_LLVM >= 0x800) {
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if (HAVE_LLVM >= 0x800) {
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ac_build_llvm8_buffer_store_common(ctx, rsrc, data, vindex,
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ac_build_llvm8_buffer_store_common(ctx, rsrc, data, vindex,
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voffset, NULL, num_channels,
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voffset, NULL, num_channels,
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ctx->f32, glc, false,
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ctx->f32, glc, slc,
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writeonly_memory, true, true);
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writeonly_memory, true, true);
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} else {
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} else {
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ac_build_llvm7_buffer_store_common(ctx, rsrc, data, vindex, voffset,
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ac_build_llvm7_buffer_store_common(ctx, rsrc, data, vindex, voffset,
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num_channels, glc, false,
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num_channels, glc, slc,
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writeonly_memory, true);
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writeonly_memory, true);
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}
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}
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}
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}
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@@ -282,6 +282,7 @@ ac_build_buffer_store_format(struct ac_llvm_context *ctx,
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LLVMValueRef voffset,
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LLVMValueRef voffset,
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unsigned num_channels,
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unsigned num_channels,
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bool glc,
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bool glc,
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bool slc,
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bool writeonly_memory);
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bool writeonly_memory);
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LLVMValueRef
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LLVMValueRef
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@@ -2556,7 +2556,7 @@ static void visit_image_store(struct ac_nir_context *ctx,
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ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
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ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
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ctx->ac.i32_0, src_channels,
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ctx->ac.i32_0, src_channels,
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args.cache_policy & ac_glc,
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args.cache_policy & ac_glc, false,
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writeonly_memory);
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writeonly_memory);
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} else {
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} else {
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args.opcode = ac_image_store;
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args.opcode = ac_image_store;
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@@ -856,18 +856,15 @@ void si_build_prim_discard_compute_shader(struct si_shader_context *ctx)
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}
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}
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/* Write indices for accepted primitives. */
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/* Write indices for accepted primitives. */
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LLVMValueRef buf_args[] = {
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LLVMValueRef vindex = LLVMBuildAdd(builder, start, prim_index, "");
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ac_to_float(&ctx->ac, ac_build_expand_to_vec4(&ctx->ac,
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LLVMValueRef vdata = ac_build_gather_values(&ctx->ac, index, 3);
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ac_build_gather_values(&ctx->ac, index, 3), 3)),
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output_indexbuf,
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if (!ac_has_vec3_support(ctx->ac.chip_class, true))
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LLVMBuildAdd(builder, start, prim_index, ""),
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vdata = ac_build_expand_to_vec4(&ctx->ac, vdata, 3);
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ctx->i32_0, /* voffset */
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ctx->i1true, /* glc */
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ac_build_buffer_store_format(&ctx->ac, output_indexbuf, vdata,
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LLVMConstInt(ctx->i1, INDEX_STORES_USE_SLC, 0),
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vindex, ctx->i32_0, 3, true,
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};
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INDEX_STORES_USE_SLC, true);
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ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32",
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ctx->voidt, buf_args, 6,
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ac_get_store_intr_attribs(true));
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}
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}
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lp_build_endif(&if_accepted);
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lp_build_endif(&if_accepted);
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@@ -728,7 +728,7 @@ static void store_emit(
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ac_build_gather_values(&ctx->ac, chans, num_channels),
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ac_build_gather_values(&ctx->ac, chans, num_channels),
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vindex, ctx->i32_0 /* voffset */,
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vindex, ctx->i32_0 /* voffset */,
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num_channels,
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num_channels,
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!!(args.cache_policy & ac_glc),
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!!(args.cache_policy & ac_glc), false,
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writeonly_memory);
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writeonly_memory);
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} else {
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} else {
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args.opcode = ac_image_store;
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args.opcode = ac_image_store;
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