diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b443edd7be0..7c369f39813 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1912,7 +1912,7 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND;
 
    if (!cmd_buffer->state.emitted_graphics_pipeline ||
-       cmd_buffer->state.emitted_graphics_pipeline->cb_color_control != pipeline->cb_color_control ||
+       cmd_buffer->state.emitted_graphics_pipeline->disable_dual_quad != pipeline->disable_dual_quad ||
        cmd_buffer->state.emitted_graphics_pipeline->custom_blend_mode != pipeline->custom_blend_mode)
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP |
                                  RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE;
@@ -2381,8 +2381,8 @@ static void
 radv_emit_logic_op(struct radv_cmd_buffer *cmd_buffer)
 {
    const struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
-   unsigned cb_color_control = cmd_buffer->state.graphics_pipeline->cb_color_control;
    const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
+   unsigned cb_color_control = 0;
 
    if (d->logic_op_enable) {
       cb_color_control |= S_028808_ROP3(d->logic_op);
@@ -2391,7 +2391,8 @@ radv_emit_logic_op(struct radv_cmd_buffer *cmd_buffer)
    }
 
    if (cmd_buffer->device->physical_device->rad_info.has_rbplus) {
-      cb_color_control |= S_028808_DISABLE_DUAL_QUAD(d->logic_op_enable);
+      cb_color_control |=
+         S_028808_DISABLE_DUAL_QUAD(pipeline->disable_dual_quad || d->logic_op_enable);
    }
 
    if (pipeline->custom_blend_mode) {
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 7520c162b4d..d64eefd9089 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -726,7 +726,7 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline,
 {
    const struct radv_device *device = pipeline->base.device;
    struct radv_blend_state blend = {0};
-   unsigned cb_color_control = 0;
+   bool disable_dual_quad = false;
    const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
    int i;
 
@@ -858,15 +858,16 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline,
       /* RB+ doesn't work with dual source blending, logic op and
        * RESOLVE.
        */
-      if (blend.mrt0_is_dual_src || (state->cb && state->cb->logic_op_enable) ||
+      if (blend.mrt0_is_dual_src ||
+          (state->cb && !(pipeline->dynamic_states & RADV_DYNAMIC_LOGIC_OP_ENABLE) && state->cb->logic_op_enable) ||
           (device->physical_device->rad_info.gfx_level >= GFX11 && blend.blend_enable_4bit))
-         cb_color_control |= S_028808_DISABLE_DUAL_QUAD(1);
+         disable_dual_quad = true;
    }
 
    if (state->rp)
       radv_pipeline_compute_spi_color_formats(pipeline, &blend, state, has_ps_epilog);
 
-   pipeline->cb_color_control = cb_color_control;
+   pipeline->disable_dual_quad = disable_dual_quad;
 
    return blend;
 }
@@ -5618,7 +5619,7 @@ radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline,
       blend_state->cb_shader_mask = 0xf;
 
       if (extra->custom_blend_mode == V_028808_CB_RESOLVE)
-         pipeline->cb_color_control |= S_028808_DISABLE_DUAL_QUAD(1);
+         pipeline->disable_dual_quad = true;
 
       pipeline->custom_blend_mode = extra->custom_blend_mode;
    }
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 15834eb5b1a..c4d493c218a 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -2088,7 +2088,7 @@ struct radv_graphics_pipeline {
    struct radv_ia_multi_vgt_param_helpers ia_multi_vgt_param;
    uint8_t vtx_emit_num;
    uint64_t needed_dynamic_state;
-   unsigned cb_color_control;
+   bool disable_dual_quad;
    unsigned cb_blend_control[MAX_RTS];
    unsigned sx_mrt_blend_opt[MAX_RTS];
    uint32_t binding_stride[MAX_VBS];