panfrost: On Bifrost, set the right tiler descriptor
On both fragment and tiler jobs. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
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@@ -1818,7 +1818,7 @@ panfrost_emit_vertex_tiler_jobs(struct panfrost_batch *batch,
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bifrost_tiler.prefix = *tiler_prefix;
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bifrost_tiler.tiler.primitive_size = *primitive_size;
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//bifrost_tiler.tiler.tiler_meta;
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bifrost_tiler.tiler.tiler_meta = panfrost_batch_get_tiler_meta(batch, ~0);
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bifrost_tiler.postfix = *tiler_postfix;
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tp = &bifrost_tiler;
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tp_size = sizeof(bifrost_tiler);
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@@ -699,6 +699,41 @@ panfrost_batch_get_tiler_heap(struct panfrost_batch *batch)
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return batch->tiler_heap;
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}
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/* TODO: Figure out how to remove the hardcoded values */
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mali_ptr
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panfrost_batch_get_tiler_meta(struct panfrost_batch *batch, unsigned vertex_count)
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{
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if (!vertex_count)
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return 0;
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if (batch->tiler_meta)
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return batch->tiler_meta;
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struct panfrost_bo *tiler_heap;
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tiler_heap = panfrost_batch_get_tiler_heap(batch);
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struct bifrost_tiler_heap_meta tiler_heap_meta = {
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.heap_size = tiler_heap->size,
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.tiler_heap_start = tiler_heap->gpu,
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.tiler_heap_free = tiler_heap->gpu,
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.tiler_heap_end = tiler_heap->gpu + tiler_heap->size,
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};
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tiler_heap_meta.zeros[10] = 0x1;
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tiler_heap_meta.zeros[11] = 0x7e007e;
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struct bifrost_tiler_meta tiler_meta = {
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.hierarchy_mask = 0xf0,
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.flags = 0x0,
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.width = MALI_POSITIVE(batch->key.width),
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.height = MALI_POSITIVE(batch->key.height),
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.tiler_heap_meta = panfrost_upload_transient(batch, &tiler_heap_meta, sizeof(tiler_heap_meta)),
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};
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batch->tiler_meta = panfrost_upload_transient(batch, &tiler_meta, sizeof(tiler_meta));
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return batch->tiler_meta;
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}
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struct panfrost_bo *
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panfrost_batch_get_tiler_dummy(struct panfrost_batch *batch)
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{
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@@ -142,6 +142,9 @@ struct panfrost_batch {
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/* Framebuffer descriptor. */
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struct panfrost_transfer framebuffer;
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/* Bifrost tiler meta descriptor. */
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mali_ptr tiler_meta;
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/* Output sync object. Only valid when submitted is true. */
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struct panfrost_batch_fence *out_sync;
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@@ -240,4 +243,7 @@ void panfrost_scoreboard_initialize_tiler(struct panfrost_batch *batch);
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bool
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panfrost_batch_is_scanout(struct panfrost_batch *batch);
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mali_ptr
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panfrost_batch_get_tiler_meta(struct panfrost_batch *batch, unsigned vertex_count);
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#endif
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@@ -25,6 +25,7 @@
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#include "pan_bo.h"
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#include "pan_context.h"
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#include "pan_util.h"
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#include "panfrost-quirks.h"
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static struct mali_rt_format
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panfrost_mfbd_format(struct pipe_surface *surf)
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@@ -377,8 +378,6 @@ panfrost_emit_mfbd(struct panfrost_batch *batch, unsigned vertex_count)
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.rt_count_1 = MALI_POSITIVE(batch->key.nr_cbufs),
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.rt_count_2 = 4,
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.tiler = panfrost_emit_midg_tiler(batch, vertex_count),
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.shared_memory = {
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.stack_shift = shift,
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.scratchpad = panfrost_batch_get_scratchpad(batch, shift, dev->thread_tls_alloc, dev->core_count)->gpu,
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@@ -386,6 +385,11 @@ panfrost_emit_mfbd(struct panfrost_batch *batch, unsigned vertex_count)
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}
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};
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if (dev->quirks & IS_BIFROST)
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framebuffer.tiler_meta = panfrost_batch_get_tiler_meta(batch, vertex_count);
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else
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framebuffer.tiler = panfrost_emit_midg_tiler(batch, vertex_count);
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return framebuffer;
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}
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@@ -1702,7 +1702,13 @@ struct mali_framebuffer {
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u32 mfbd_flags : 24; // = 0x100
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float clear_depth;
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struct midgard_tiler_descriptor tiler;
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union {
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struct midgard_tiler_descriptor tiler;
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struct {
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mali_ptr tiler_meta;
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u32 zeros[16];
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};
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};
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/* optional: struct mali_framebuffer_extra extra */
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/* struct mali_render_target rts[] */
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@@ -629,24 +629,18 @@ pandecode_midgard_tiler_descriptor(
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/* TODO: The Bifrost tiler is not understood at all yet */
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static void
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pandecode_bifrost_tiler_descriptor(const struct midgard_tiler_descriptor *t)
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pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
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{
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pandecode_log(".tiler = {\n");
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pandecode_indent++;
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pandecode_prop("polygon_list_size = 0x%" PRIx32, t->polygon_list_size);
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pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
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pandecode_prop("flags = 0x%" PRIx16, t->flags);
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MEMORY_PROP(fb, tiler_meta);
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MEMORY_PROP(t, polygon_list);
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MEMORY_PROP(t, polygon_list_body);
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MEMORY_PROP(t, heap_start);
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MEMORY_PROP(t, heap_end);
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pandecode_log(".weights = { ");
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for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
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pandecode_log_cont("%d, ", t->weights[w]);
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for (int i = 0; i < 16; i++) {
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if (fb->zeros[i] != 0) {
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pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
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i, fb->zeros[i]);
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}
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}
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pandecode_log("},\n");
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@@ -1180,12 +1174,11 @@ pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_comput
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if (fb->clear_depth)
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pandecode_prop("clear_depth = %f", fb->clear_depth);
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const struct midgard_tiler_descriptor t = fb->tiler;
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if (!is_compute)
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if (is_bifrost)
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pandecode_bifrost_tiler_descriptor(&t);
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pandecode_bifrost_tiler_descriptor(fb);
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else
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pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
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pandecode_midgard_tiler_descriptor(&fb->tiler, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
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else
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pandecode_msg("XXX: skipping compute MFBD, fixme\n");
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@@ -2592,17 +2585,10 @@ pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int jo
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static void
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pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
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{
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struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
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if (gpu_va == 0) {
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pandecode_msg("XXX: bifrost_tiler_heap_meta is NULL!!\n");
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return;
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}
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const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
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pandecode_log("struct mali_tiler_heap_meta tiler_heap_meta_%d = {\n", job_no);
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pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
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pandecode_indent++;
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if (h->zero) {
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@@ -2646,7 +2632,7 @@ pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
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pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
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pandecode_log("struct bifrost_tiler_meta tiler_meta_%d = {\n", job_no);
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pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
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pandecode_indent++;
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if (t->zero0 || t->zero1) {
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@@ -2746,7 +2732,7 @@ pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
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pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
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pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
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pandecode_log("struct bifrost_payload_tiler payload_%d = {\n", job_no);
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pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
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pandecode_indent++;
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pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
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