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tgsi: rename the TGSI fragment kill opcodes

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TGSI_OPCODE_KIL and KILP had confusing names.  The former was conditional
kill (if any src component < 0).  The later was unconditional kill.
At one time KILP was supposed to work with NV-style condition
codes/predicates but we never had that in TGSI.

This patch renames both opcodes:
  TGSI_OPCODE_KIL -> KILL_IF   (kill if src.xyzw < 0)
  TGSI_OPCODE_KILP -> KILL     (unconditional kill)

Note: I didn't just transpose the opcode names to help ensure that I
didn't miss updating any code anywhere.

I believe I've updated all the relevant code and comments but I'm
not 100% sure that some drivers had this right in the first place.
For example, the radeon driver might have llvm.AMDGPU.kill and
llvm.AMDGPU.kilp mixed up.  Driver authors should review their code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
This commit is contained in:
Brian Paul
2013-07-11 17:02:37 -06:00
parent f501baabdb
commit 46205ab8cc
32 changed files with 109 additions and 110 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/auxiliary/draw/draw_pipe_aapoint.c
View File

@@ -308,9 +308,9 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_W;
ctx->emit_instruction(ctx, &newInst);
/* KIL -tmp0.yyyy; # if -tmp0.y < 0, KILL */
/* KILL_IF -tmp0.yyyy; # if -tmp0.y < 0, KILL */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
newInst.Instruction.Opcode = TGSI_OPCODE_KILL_IF;
newInst.Instruction.NumDstRegs = 0;
newInst.Instruction.NumSrcRegs = 1;
newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;

8
src/gallium/auxiliary/draw/draw_pipe_pstipple.c
View File

@@ -278,7 +278,7 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
/*
* Insert new MUL/TEX/KILP instructions at start of program
* Insert new MUL/TEX/KILL_IF instructions at start of program
* Take gl_FragCoord, divide by 32 (stipple size), sample the
* texture and kill fragment if needed.
*
@@ -315,9 +315,9 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
newInst.Src[1].Register.Index = pctx->freeSampler;
ctx->emit_instruction(ctx, &newInst);
/* KIL -texTemp; # if -texTemp < 0, KILL fragment */
/* KILL_IF -texTemp; # if -texTemp < 0, KILL fragment */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
newInst.Instruction.Opcode = TGSI_OPCODE_KILL_IF;
newInst.Instruction.NumDstRegs = 0;
newInst.Instruction.NumSrcRegs = 1;
newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
@@ -402,7 +402,7 @@ pstip_update_texture(struct pstip_stage *pstip)
/*
* Load alpha texture.
* Note: 0 means keep the fragment, 255 means kill it.
* We'll negate the texel value and use KILP which kills if value
* We'll negate the texel value and use KILL_IF which kills if value
* is negative.
*/
for (i = 0; i < 32; i++) {

2
src/gallium/auxiliary/gallivm/lp_bld_flow.c
View File

@@ -188,7 +188,7 @@ lp_build_mask_value(struct lp_build_mask_context *mask)
/**
* Update boolean mask with given value (bitwise AND).
* Typically used to update the quad's pixel alive/killed mask
* after depth testing, alpha testing, TGSI_OPCODE_KIL, etc.
* after depth testing, alpha testing, TGSI_OPCODE_KILL_IF, etc.
*/
void
lp_build_mask_update(struct lp_build_mask_context *mask,

8
src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
View File

@@ -396,7 +396,7 @@ frc_emit(
TGSI_OPCODE_SUB, emit_data->args[0], tmp);
}
/* TGSI_OPCODE_KIL */
/* TGSI_OPCODE_KILL_IF */
static void
kil_fetch_args(
@@ -419,7 +419,7 @@ kil_fetch_args(
emit_data->dst_type = LLVMVoidTypeInContext(bld_base->base.gallivm->context);
}
/* TGSI_OPCODE_KILP */
/* TGSI_OPCODE_KILL */
static void
kilp_fetch_args(
@@ -871,8 +871,8 @@ lp_set_default_actions(struct lp_build_tgsi_context * bld_base)
bld_base->op_actions[TGSI_OPCODE_EX2].fetch_args = scalar_unary_fetch_args;
bld_base->op_actions[TGSI_OPCODE_IF].fetch_args = scalar_unary_fetch_args;
bld_base->op_actions[TGSI_OPCODE_UIF].fetch_args = scalar_unary_fetch_args;
bld_base->op_actions[TGSI_OPCODE_KIL].fetch_args = kil_fetch_args;
bld_base->op_actions[TGSI_OPCODE_KILP].fetch_args = kilp_fetch_args;
bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kil_fetch_args;
bld_base->op_actions[TGSI_OPCODE_KILL].fetch_args = kilp_fetch_args;
bld_base->op_actions[TGSI_OPCODE_RCP].fetch_args = scalar_unary_fetch_args;
bld_base->op_actions[TGSI_OPCODE_SIN].fetch_args = scalar_unary_fetch_args;
bld_base->op_actions[TGSI_OPCODE_LG2].fetch_args = scalar_unary_fetch_args;

6
src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
View File

@@ -657,12 +657,10 @@ lp_emit_instruction_aos(
case TGSI_OPCODE_DDY:
return FALSE;
case TGSI_OPCODE_KILP:
/* predicated kill */
case TGSI_OPCODE_KILL:
return FALSE;
case TGSI_OPCODE_KIL:
/* conditional kill */
case TGSI_OPCODE_KILL_IF:
return FALSE;
case TGSI_OPCODE_PK2H:

16
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
View File

@@ -2043,7 +2043,7 @@ near_end_of_shader(struct lp_build_tgsi_soa_context *bld,
* Kill fragment if any of the src register values are negative.
*/
static void
emit_kil(
emit_kill_if(
struct lp_build_tgsi_soa_context *bld,
const struct tgsi_full_instruction *inst,
int pc)
@@ -2101,7 +2101,7 @@ emit_kil(
* we're inside a loop or conditional.
*/
static void
emit_kilp(struct lp_build_tgsi_soa_context *bld,
emit_kill(struct lp_build_tgsi_soa_context *bld,
int pc)
{
LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder;
@@ -2319,25 +2319,25 @@ ddy_emit(
}
static void
kilp_emit(
kill_emit(
const struct lp_build_tgsi_action * action,
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
emit_kilp(bld, bld_base->pc - 1);
emit_kill(bld, bld_base->pc - 1);
}
static void
kil_emit(
kill_if_emit(
const struct lp_build_tgsi_action * action,
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
emit_kil(bld, emit_data->inst, bld_base->pc - 1);
emit_kill_if(bld, emit_data->inst, bld_base->pc - 1);
}
static void
@@ -3168,8 +3168,8 @@ lp_build_tgsi_soa(struct gallivm_state *gallivm,
bld.bld_base.op_actions[TGSI_OPCODE_ENDSWITCH].emit = endswitch_emit;
bld.bld_base.op_actions[TGSI_OPCODE_IF].emit = if_emit;
bld.bld_base.op_actions[TGSI_OPCODE_UIF].emit = uif_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KIL].emit = kil_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KILP].emit = kilp_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KILL_IF].emit = kill_if_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KILL].emit = kill_emit;
bld.bld_base.op_actions[TGSI_OPCODE_NRM].emit = nrm_emit;
bld.bld_base.op_actions[TGSI_OPCODE_NRM4].emit = nrm_emit;
bld.bld_base.op_actions[TGSI_OPCODE_RET].emit = ret_emit;

6
src/gallium/auxiliary/postprocess/pp_mlaa.h
View File

@@ -67,7 +67,7 @@ static const char depth1fs[] = "FRAG\n"
" 12: DP4 TEMP[0].x, TEMP[2], IMM[0].zzzz\n"
" 13: SEQ TEMP[1].x, TEMP[0].xxxx, IMM[0].yyyy\n"
" 14: IF TEMP[1].xxxx :16\n"
" 15: KILP\n"
" 15: KILL\n"
" 16: ENDIF\n"
" 17: MOV OUT[0], TEMP[2]\n"
" 18: END\n";
@@ -99,7 +99,7 @@ static const char color1fs[] = "FRAG\n"
" 13: DP4 TEMP[0].x, TEMP[2], IMM[1].xxxx\n"
" 14: SEQ TEMP[1].x, TEMP[0].xxxx, IMM[1].yyyy\n"
" 15: IF TEMP[1].xxxx :17\n"
" 16: KILP\n"
" 16: KILL\n"
" 17: ENDIF\n"
" 18: MOV OUT[0], TEMP[2]\n"
" 19: END\n";
@@ -126,7 +126,7 @@ static const char neigh3fs[] = "FRAG\n"
" 8: DP4 TEMP[1].x, TEMP[5], IMM[0].xxxx\n"
" 9: SLT TEMP[4].x, TEMP[1].xxxx, IMM[0].yyyy\n"
" 10: IF TEMP[4].xxxx :12\n"
" 11: KILP\n"
" 11: KILL\n"
" 12: ENDIF\n"
" 13: TEX TEMP[4], IN[0].xyyy, SAMP[0], 2D\n"
" 14: TEX TEMP[6], IN[1].zwww, SAMP[0], 2D\n"

14
src/gallium/auxiliary/tgsi/tgsi_exec.c
View File

@@ -1578,8 +1578,8 @@ store_dest(struct tgsi_exec_machine *mach,
* Kill fragment if any of the four values is less than zero.
*/
static void
exec_kil(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
exec_kill_if(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
uint uniquemask;
uint chan_index;
@@ -1617,7 +1617,7 @@ exec_kil(struct tgsi_exec_machine *mach,
* Unconditional fragment kill/discard.
*/
static void
exec_kilp(struct tgsi_exec_machine *mach,
exec_kill(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
@@ -3624,12 +3624,12 @@ exec_instruction(
exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_KILP:
exec_kilp (mach, inst);
case TGSI_OPCODE_KILL:
exec_kill (mach, inst);
break;
case TGSI_OPCODE_KIL:
exec_kil (mach, inst);
case TGSI_OPCODE_KILL_IF:
exec_kill_if (mach, inst);
break;
case TGSI_OPCODE_PK2H:

4
src/gallium/auxiliary/tgsi/tgsi_info.c
View File

@@ -76,7 +76,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 1, 1, 0, 0, 0, 0, REPL, "COS", TGSI_OPCODE_COS },
{ 1, 1, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX },
{ 1, 1, 0, 0, 0, 0, COMP, "DDY", TGSI_OPCODE_DDY },
{ 0, 0, 0, 0, 0, 0, NONE, "KILP", TGSI_OPCODE_KILP },
{ 0, 0, 0, 0, 0, 0, NONE, "KILL", TGSI_OPCODE_KILL },
{ 1, 1, 0, 0, 0, 0, COMP, "PK2H", TGSI_OPCODE_PK2H },
{ 1, 1, 0, 0, 0, 0, COMP, "PK2US", TGSI_OPCODE_PK2US },
{ 1, 1, 0, 0, 0, 0, COMP, "PK4B", TGSI_OPCODE_PK4B },
@@ -153,7 +153,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 0, 1, 0, 0, 0, 0, NONE, "CALLNZ", TGSI_OPCODE_CALLNZ },
{ 0, 1, 0, 0, 0, 0, NONE, "", 114 }, /* removed */
{ 0, 1, 0, 0, 0, 0, NONE, "BREAKC", TGSI_OPCODE_BREAKC },
{ 0, 1, 0, 0, 0, 0, NONE, "KIL", TGSI_OPCODE_KIL },
{ 0, 1, 0, 0, 0, 0, NONE, "KILL_IF", TGSI_OPCODE_KILL_IF },
{ 0, 0, 0, 0, 0, 0, NONE, "END", TGSI_OPCODE_END },
{ 0, 0, 0, 0, 0, 0, NONE, "", 118 }, /* removed */
{ 1, 1, 0, 0, 0, 0, COMP, "F2I", TGSI_OPCODE_F2I },

4
src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
View File

@@ -92,7 +92,7 @@ OP12(DPH)
OP11(COS)
OP11(DDX)
OP11(DDY)
OP00(KILP)
OP00(KILL)
OP11(PK2H)
OP11(PK2US)
OP11(PK4B)
@@ -156,7 +156,7 @@ OP00(NOP)
OP11(NRM4)
OP01(CALLNZ)
OP01(BREAKC)
OP01(KIL)
OP01(KILL_IF)
OP00(END)
OP11(F2I)
OP12(IDIV)

4
src/gallium/auxiliary/tgsi/tgsi_scan.c
View File

@@ -263,8 +263,8 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
}
}
info->uses_kill = (info->opcode_count[TGSI_OPCODE_KIL] ||
info->opcode_count[TGSI_OPCODE_KILP]);
info->uses_kill = (info->opcode_count[TGSI_OPCODE_KILL_IF] ||
info->opcode_count[TGSI_OPCODE_KILL]);
/* extract simple properties */
for (i = 0; i < info->num_properties; ++i) {

2
src/gallium/auxiliary/tgsi/tgsi_scan.h
View File

@@ -70,7 +70,7 @@ struct tgsi_shader_info
boolean writes_z; /**< does fragment shader write Z value? */
boolean writes_stencil; /**< does fragment shader write stencil value? */
boolean writes_edgeflag; /**< vertex shader outputs edgeflag */
boolean uses_kill; /**< KIL or KILP instruction used? */
boolean uses_kill; /**< KILL or KILL_IF instruction used? */
boolean uses_instanceid;
boolean uses_vertexid;
boolean uses_primid;

10
src/gallium/auxiliary/util/u_pstipple.c
View File

@@ -75,7 +75,7 @@ util_pstipple_update_stipple_texture(struct pipe_context *pipe,
/*
* Load alpha texture.
* Note: 0 means keep the fragment, 255 means kill it.
* We'll negate the texel value and use KILP which kills if value
* We'll negate the texel value and use KILL_IF which kills if value
* is negative.
*/
for (i = 0; i < 32; i++) {
@@ -252,7 +252,7 @@ free_bit(uint bitfield)
* declare new registers
* MUL texTemp, INPUT[wincoord], 1/32;
* TEX texTemp, texTemp, sampler;
* KIL -texTemp; # if -texTemp < 0, KILL fragment
* KILL_IF -texTemp; # if -texTemp < 0, kill fragment
* [...original code...]
*/
static void
@@ -340,7 +340,7 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
/*
* Insert new MUL/TEX/KILP instructions at start of program
* Insert new MUL/TEX/KILL_IF instructions at start of program
* Take gl_FragCoord, divide by 32 (stipple size), sample the
* texture and kill fragment if needed.
*
@@ -379,9 +379,9 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
newInst.Src[1].Register.Index = pctx->freeSampler;
ctx->emit_instruction(ctx, &newInst);
/* KIL -texTemp; # if -texTemp < 0, KILL fragment */
/* KILL_IF -texTemp; # if -texTemp < 0, kill fragment */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
newInst.Instruction.Opcode = TGSI_OPCODE_KILL_IF;
newInst.Instruction.NumDstRegs = 0;
newInst.Instruction.NumSrcRegs = 1;
newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;

2
src/gallium/auxiliary/vl/vl_mc.c
View File

@@ -340,7 +340,7 @@ create_ycbcr_frag_shader(struct vl_mc *r, float scale, bool invert,
ureg_IF(shader, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y), &label);
ureg_KILP(shader);
ureg_KILL(shader);
ureg_fixup_label(shader, label, ureg_get_instruction_number(shader));
ureg_ELSE(shader, &label);

6
src/gallium/docs/source/tgsi.rst
View File

@@ -741,7 +741,9 @@ This instruction replicates its result.
dst.w = (src0.w < 0) ? src1.w : src2.w
.. opcode:: KIL - Conditional Discard
.. opcode:: KILL_IF - Conditional Discard
Conditional discard. Allowed in fragment shaders only.
.. math::
@@ -750,7 +752,7 @@ This instruction replicates its result.
endif
.. opcode:: KILP - Discard
.. opcode:: KILL - Discard
Unconditional discard. Allowed in fragment shaders only.

4
src/gallium/drivers/i915/i915_fpc_optimize.c
View File

@@ -65,8 +65,8 @@ static boolean same_src_reg(struct i915_full_src_register* d1, struct i915_full_
static boolean has_destination(unsigned opcode)
{
return (opcode != TGSI_OPCODE_NOP &&
opcode != TGSI_OPCODE_KIL &&
opcode != TGSI_OPCODE_KILP &&
opcode != TGSI_OPCODE_KILL_IF &&
opcode != TGSI_OPCODE_KILL &&
opcode != TGSI_OPCODE_END &&
opcode != TGSI_OPCODE_RET);
}

8
src/gallium/drivers/i915/i915_fpc_translate.c
View File

@@ -662,7 +662,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
emit_simple_arith(p, inst, A0_FRC, 1, fs);
break;
case TGSI_OPCODE_KIL:
case TGSI_OPCODE_KILL_IF:
/* kill if src[0].x < 0 || src[0].y < 0 ... */
src0 = src_vector(p, &inst->Src[0], fs);
tmp = i915_get_utemp(p);
@@ -676,10 +676,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
1); /* num_coord */
break;
case TGSI_OPCODE_KILP:
/* We emit an unconditional kill; we may want to revisit
* if we ever implement conditionals.
*/
case TGSI_OPCODE_KILL:
/* unconditional kill */
tmp = i915_get_utemp(p);
i915_emit_texld(p,

2
src/gallium/drivers/ilo/shader/ilo_shader_fs.c
View File

@@ -1191,7 +1191,7 @@ fs_lower_opcode_kil(struct toy_compiler *tc, struct toy_inst *inst)
f0 = tsrc_rect(tsrc_uw(tsrc(TOY_FILE_ARF, BRW_ARF_FLAG, 0)), TOY_RECT_010);
/* KILP or KIL */
/* KILL or KILL_IF */
if (tsrc_is_null(inst->src[0])) {
struct toy_src dummy = tsrc_uw(tsrc(TOY_FILE_GRF, 0, 0));
struct toy_dst f0_dst = tdst_uw(tdst(TOY_FILE_ARF, BRW_ARF_FLAG, 0));

16
src/gallium/drivers/ilo/shader/toy_tgsi.c
View File

@@ -61,7 +61,7 @@ static const struct {
[TGSI_OPCODE_ABS] = { BRW_OPCODE_MOV, 1, 1 },
[TGSI_OPCODE_DPH] = { BRW_OPCODE_DPH, 1, 2 },
[TGSI_OPCODE_COS] = { TOY_OPCODE_COS, 1, 1 },
[TGSI_OPCODE_KILP] = { TOY_OPCODE_KIL, 0, 0 },
[TGSI_OPCODE_KILL] = { TOY_OPCODE_KIL, 0, 0 },
[TGSI_OPCODE_SIN] = { TOY_OPCODE_SIN, 1, 1 },
[TGSI_OPCODE_ARR] = { BRW_OPCODE_RNDZ, 1, 1 },
[TGSI_OPCODE_DP2] = { BRW_OPCODE_DP2, 1, 2 },
@@ -80,7 +80,7 @@ static const struct {
[TGSI_OPCODE_EMIT] = { TOY_OPCODE_EMIT, 0, 0 },
[TGSI_OPCODE_ENDPRIM] = { TOY_OPCODE_ENDPRIM, 0, 0 },
[TGSI_OPCODE_NOP] = { BRW_OPCODE_NOP, 0, 0 },
[TGSI_OPCODE_KIL] = { TOY_OPCODE_KIL, 0, 1 },
[TGSI_OPCODE_KILL_IF] = { TOY_OPCODE_KIL, 0, 1 },
[TGSI_OPCODE_END] = { BRW_OPCODE_NOP, 0, 0 },
[TGSI_OPCODE_F2I] = { BRW_OPCODE_MOV, 1, 1 },
[TGSI_OPCODE_IDIV] = { TOY_OPCODE_INT_DIV_QUOTIENT, 1, 2 },
@@ -866,7 +866,7 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_COS] = aos_simple,
[TGSI_OPCODE_DDX] = aos_unsupported,
[TGSI_OPCODE_DDY] = aos_unsupported,
[TGSI_OPCODE_KILP] = aos_simple,
[TGSI_OPCODE_KILL] = aos_simple,
[TGSI_OPCODE_PK2H] = aos_PK2H,
[TGSI_OPCODE_PK2US] = aos_unsupported,
[TGSI_OPCODE_PK4B] = aos_unsupported,
@@ -942,7 +942,7 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_NRM4] = aos_NRM4,
[TGSI_OPCODE_CALLNZ] = aos_unsupported,
[TGSI_OPCODE_BREAKC] = aos_unsupported,
[TGSI_OPCODE_KIL] = aos_simple,
[TGSI_OPCODE_KILL_IF] = aos_simple,
[TGSI_OPCODE_END] = aos_simple,
[118] = aos_unsupported,
[TGSI_OPCODE_F2I] = aos_simple,
@@ -1482,7 +1482,7 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_COS] = soa_scalar_replicate,
[TGSI_OPCODE_DDX] = soa_partial_derivative,
[TGSI_OPCODE_DDY] = soa_partial_derivative,
[TGSI_OPCODE_KILP] = soa_passthrough,
[TGSI_OPCODE_KILL] = soa_passthrough,
[TGSI_OPCODE_PK2H] = soa_PK2H,
[TGSI_OPCODE_PK2US] = soa_unsupported,
[TGSI_OPCODE_PK4B] = soa_unsupported,
@@ -1558,7 +1558,7 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_NRM4] = soa_NRM4,
[TGSI_OPCODE_CALLNZ] = soa_unsupported,
[TGSI_OPCODE_BREAKC] = soa_unsupported,
[TGSI_OPCODE_KIL] = soa_passthrough,
[TGSI_OPCODE_KILL_IF] = soa_passthrough,
[TGSI_OPCODE_END] = soa_passthrough,
[118] = soa_unsupported,
[TGSI_OPCODE_F2I] = soa_per_channel,
@@ -2238,8 +2238,8 @@ parse_instruction(struct toy_tgsi *tgsi,
}
switch (tgsi_inst->Instruction.Opcode) {
case TGSI_OPCODE_KIL:
case TGSI_OPCODE_KILP:
case TGSI_OPCODE_KILL_IF:
case TGSI_OPCODE_KILL:
tgsi->uses_kill = true;
break;
}

6
src/gallium/drivers/nv30/nvfx_fragprog.c
View File

@@ -197,7 +197,7 @@ nvfx_fp_emit(struct nvfx_fpc *fpc, struct nvfx_insn insn)
hw = &fp->insn[fpc->inst_offset];
memset(hw, 0, sizeof(uint32_t) * 4);
if (insn.op == NVFX_FP_OP_OPCODE_KIL)
if (insn.op == NVFX_FP_OP_OPCODE_KILL_IF)
fp->fp_control |= NV30_3D_FP_CONTROL_USES_KIL;
hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT);
hw[0] |= (insn.mask << NVFX_FP_OP_OUTMASK_SHIFT);
@@ -605,10 +605,10 @@ nvfx_fragprog_parse_instruction(struct nv30_context* nvfx, struct nvfx_fpc *fpc,
case TGSI_OPCODE_FRC:
nvfx_fp_emit(fpc, arith(sat, FRC, dst, mask, src[0], none, none));
break;
case TGSI_OPCODE_KILP:
case TGSI_OPCODE_KILL:
nvfx_fp_emit(fpc, arith(0, KIL, none.reg, 0, none, none, none));
break;
case TGSI_OPCODE_KIL:
case TGSI_OPCODE_KILL_IF:
insn = arith(0, MOV, none.reg, NVFX_FP_MASK_ALL, src[0], none, none);
insn.cc_update = 1;
nvfx_fp_emit(fpc, insn);

10
src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp
View File

@@ -228,7 +228,7 @@ unsigned int Instruction::srcMask(unsigned int s) const
return 0x7;
case TGSI_OPCODE_DP4:
case TGSI_OPCODE_DPH:
case TGSI_OPCODE_KIL: /* WriteMask ignored */
case TGSI_OPCODE_KILL_IF: /* WriteMask ignored */
return 0xf;
case TGSI_OPCODE_DST:
return mask & (s ? 0xa : 0x6);
@@ -512,7 +512,7 @@ static nv50_ir::operation translateOpcode(uint opcode)
NV50_IR_OPCODE_CASE(COS, COS);
NV50_IR_OPCODE_CASE(DDX, DFDX);
NV50_IR_OPCODE_CASE(DDY, DFDY);
NV50_IR_OPCODE_CASE(KILP, DISCARD);
NV50_IR_OPCODE_CASE(KILL, DISCARD);
NV50_IR_OPCODE_CASE(SEQ, SET);
NV50_IR_OPCODE_CASE(SFL, SET);
@@ -553,7 +553,7 @@ static nv50_ir::operation translateOpcode(uint opcode)
NV50_IR_OPCODE_CASE(EMIT, EMIT);
NV50_IR_OPCODE_CASE(ENDPRIM, RESTART);
NV50_IR_OPCODE_CASE(KIL, DISCARD);
NV50_IR_OPCODE_CASE(KILL_IF, DISCARD);
NV50_IR_OPCODE_CASE(F2I, CVT);
NV50_IR_OPCODE_CASE(IDIV, DIV);
@@ -2366,14 +2366,14 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], src0, src1);
}
break;
case TGSI_OPCODE_KIL:
case TGSI_OPCODE_KILL_IF:
val0 = new_LValue(func, FILE_PREDICATE);
for (c = 0; c < 4; ++c) {
mkCmp(OP_SET, CC_LT, TYPE_F32, val0, fetchSrc(0, c), zero);
mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0);
}
break;
case TGSI_OPCODE_KILP:
case TGSI_OPCODE_KILL:
mkOp(OP_DISCARD, TYPE_NONE, NULL);
break;
case TGSI_OPCODE_TEX:

2
src/gallium/drivers/r300/compiler/r3xx_fragprog.c
View File

@@ -119,7 +119,7 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
{"rewrite depth out", 1, 1, rc_rewrite_depth_out, NULL},
/* This transformation needs to be done before any of the IF
* instructions are modified. */
{"transform KILP", 1, 1, rc_transform_KILP, NULL},
{"transform KILP", 1, 1, rc_transform_KILL, NULL},
{"unroll loops", 1, is_r500, rc_unroll_loops, NULL},
{"transform loops", 1, !is_r500, rc_transform_loops, NULL},
{"emulate branches", 1, !is_r500, rc_emulate_branches, NULL},

12
src/gallium/drivers/r300/compiler/radeon_program_alu.c
View File

@@ -1209,14 +1209,14 @@ int radeonTransformDeriv(struct radeon_compiler* c,
/**
* IF Temp[0].x -> IF Temp[0].x
* ... -> ...
* KILP -> KIL -abs(Temp[0].x)
* KILL -> KIL -abs(Temp[0].x)
* ... -> ...
* ENDIF -> ENDIF
*
* === OR ===
*
* IF Temp[0].x -\
* KILP - > KIL -abs(Temp[0].x)
* KILL - > KIL -abs(Temp[0].x)
* ENDIF -/
*
* === OR ===
@@ -1225,18 +1225,18 @@ int radeonTransformDeriv(struct radeon_compiler* c,
* ... -> ...
* ELSE -> ELSE
* ... -> ...
* KILP -> KIL -abs(Temp[0].x)
* KILL -> KIL -abs(Temp[0].x)
* ... -> ...
* ENDIF -> ENDIF
*
* === OR ===
*
* KILP -> KIL -none.1111
* KILL -> KIL -none.1111
*
* This needs to be done in its own pass, because it might modify the
* instructions before and after KILP.
* instructions before and after KILL.
*/
void rc_transform_KILP(struct radeon_compiler * c, void *user)
void rc_transform_KILL(struct radeon_compiler * c, void *user)
{
struct rc_instruction * inst;
for (inst = c->Program.Instructions.Next;

2
src/gallium/drivers/r300/compiler/radeon_program_alu.h
View File

@@ -60,7 +60,7 @@ int radeonTransformDeriv(
struct rc_instruction * inst,
void*);
void rc_transform_KILP(struct radeon_compiler * c,
void rc_transform_KILL(struct radeon_compiler * c,
void *user);
int rc_force_output_alpha_to_one(struct radeon_compiler *c,

4
src/gallium/drivers/r300/r300_tgsi_to_rc.c
View File

@@ -69,7 +69,7 @@ static unsigned translate_opcode(unsigned opcode)
case TGSI_OPCODE_COS: return RC_OPCODE_COS;
case TGSI_OPCODE_DDX: return RC_OPCODE_DDX;
case TGSI_OPCODE_DDY: return RC_OPCODE_DDY;
case TGSI_OPCODE_KILP: return RC_OPCODE_KILP;
case TGSI_OPCODE_KILL: return RC_OPCODE_KILP;
/* case TGSI_OPCODE_PK2H: return RC_OPCODE_PK2H; */
/* case TGSI_OPCODE_PK2US: return RC_OPCODE_PK2US; */
/* case TGSI_OPCODE_PK4B: return RC_OPCODE_PK4B; */
@@ -136,7 +136,7 @@ static unsigned translate_opcode(unsigned opcode)
/* case TGSI_OPCODE_NRM4: return RC_OPCODE_NRM4; */
/* case TGSI_OPCODE_CALLNZ: return RC_OPCODE_CALLNZ; */
/* case TGSI_OPCODE_BREAKC: return RC_OPCODE_BREAKC; */
case TGSI_OPCODE_KIL: return RC_OPCODE_KIL;
case TGSI_OPCODE_KILL_IF: return RC_OPCODE_KIL;
}
fprintf(stderr, "r300: Unknown TGSI/RC opcode: %s\n", tgsi_get_opcode_name(opcode));

14
src/gallium/drivers/r600/r600_shader.c
View File

@@ -2093,7 +2093,7 @@ static int tgsi_kill(struct r600_shader_ctx *ctx)
alu.src[0].sel = V_SQ_ALU_SRC_0;
if (ctx->inst_info->tgsi_opcode == TGSI_OPCODE_KILP) {
if (ctx->inst_info->tgsi_opcode == TGSI_OPCODE_KILL) {
alu.src[1].sel = V_SQ_ALU_SRC_1;
alu.src[1].neg = 1;
} else {
@@ -5671,7 +5671,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_COS, 0, ALU_OP1_COS, tgsi_trig},
{TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex},
{TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex},
{TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */
{TGSI_OPCODE_KILL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* unconditional kill */
{TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -5753,7 +5753,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
/* gap */
{114, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_KILL_IF, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -5864,7 +5864,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_COS, 0, ALU_OP1_COS, tgsi_trig},
{TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex},
{TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex},
{TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */
{TGSI_OPCODE_KILL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* unconditional kill */
{TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -5946,7 +5946,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
/* gap */
{114, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_KILL_IF, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -6057,7 +6057,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
{TGSI_OPCODE_COS, 0, ALU_OP1_COS, cayman_trig},
{TGSI_OPCODE_DDX, 0, FETCH_OP_GET_GRADIENTS_H, tgsi_tex},
{TGSI_OPCODE_DDY, 0, FETCH_OP_GET_GRADIENTS_V, tgsi_tex},
{TGSI_OPCODE_KILP, 0, ALU_OP2_KILLGT, tgsi_kill}, /* predicated kill */
{TGSI_OPCODE_KILL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* unconditional kill */
{TGSI_OPCODE_PK2H, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK2US, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_PK4B, 0, ALU_OP0_NOP, tgsi_unsupported},
@@ -6139,7 +6139,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
/* gap */
{114, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_BREAKC, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_KIL, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_KILL_IF, 0, ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */
{TGSI_OPCODE_END, 0, ALU_OP0_NOP, tgsi_end}, /* aka HALT */
/* gap */
{118, 0, ALU_OP0_NOP, tgsi_unsupported},

8
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
View File

@@ -1251,10 +1251,10 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
bld_base->op_actions[TGSI_OPCODE_KIL].emit = kil_emit;
bld_base->op_actions[TGSI_OPCODE_KIL].intr_name = "llvm.AMDGPU.kill";
bld_base->op_actions[TGSI_OPCODE_KILP].emit = lp_build_tgsi_intrinsic;
bld_base->op_actions[TGSI_OPCODE_KILP].intr_name = "llvm.AMDGPU.kilp";
bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
bld_base->op_actions[TGSI_OPCODE_KILL_IF].intr_name = "llvm.AMDGPU.kill";
bld_base->op_actions[TGSI_OPCODE_KILL].emit = lp_build_tgsi_intrinsic;
bld_base->op_actions[TGSI_OPCODE_KILL].intr_name = "llvm.AMDGPU.kilp";
bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_readonly;
bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
bld_base->op_actions[TGSI_OPCODE_LRP].emit = build_tgsi_intrinsic_nomem;

2
src/gallium/drivers/softpipe/sp_quad_depth_test.c
View File

@@ -708,7 +708,7 @@ ALPHATEST( NOTEQUAL, != )
ALPHATEST( GEQUAL, >= )
/* XXX: Incorporate into shader using KILP.
/* XXX: Incorporate into shader using KILL_IF.
*/
static unsigned
alpha_test_quads(struct quad_stage *qs,

18
src/gallium/drivers/svga/svga_tgsi_insn.c
View File

@@ -1382,8 +1382,8 @@ emit_sub(struct svga_shader_emitter *emit,
static boolean
emit_kil(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
emit_kill_if(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
const struct tgsi_full_src_register *reg = &insn->Src[0];
struct src_register src0, srcIn;
@@ -1439,10 +1439,10 @@ emit_kil(struct svga_shader_emitter *emit,
/**
* mesa state tracker always emits kilp as an unconditional kil
* unconditional kill
*/
static boolean
emit_kilp(struct svga_shader_emitter *emit,
emit_kill(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
SVGA3dShaderDestToken temp;
@@ -2843,8 +2843,8 @@ svga_emit_instruction(struct svga_shader_emitter *emit,
/* TGSI always finishes the main func with an END */
return emit_end( emit );
case TGSI_OPCODE_KIL:
return emit_kil( emit, insn );
case TGSI_OPCODE_KILL_IF:
return emit_kill_if( emit, insn );
/* Selection opcodes. The underlying language is fairly
* non-orthogonal about these.
@@ -2929,8 +2929,8 @@ svga_emit_instruction(struct svga_shader_emitter *emit,
case TGSI_OPCODE_XPD:
return emit_xpd( emit, insn );
case TGSI_OPCODE_KILP:
return emit_kilp( emit, insn );
case TGSI_OPCODE_KILL:
return emit_kill( emit, insn );
case TGSI_OPCODE_DST:
return emit_dst_insn( emit, insn );
@@ -3420,7 +3420,7 @@ needs_to_create_zero( struct svga_shader_emitter *emit )
emit->info.opcode_count[TGSI_OPCODE_EXP] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_LOG] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_XPD] >= 1 ||
emit->info.opcode_count[TGSI_OPCODE_KILP] >= 1)
emit->info.opcode_count[TGSI_OPCODE_KILL] >= 1)
return TRUE;
return FALSE;

4
src/gallium/include/pipe/p_shader_tokens.h
View File

@@ -302,7 +302,7 @@ struct tgsi_property_data {
#define TGSI_OPCODE_COS 36
#define TGSI_OPCODE_DDX 37
#define TGSI_OPCODE_DDY 38
#define TGSI_OPCODE_KILP 39 /* predicated kill */
#define TGSI_OPCODE_KILL 39 /* unconditional */
#define TGSI_OPCODE_PK2H 40
#define TGSI_OPCODE_PK2US 41
#define TGSI_OPCODE_PK4B 42
@@ -372,7 +372,7 @@ struct tgsi_property_data {
#define TGSI_OPCODE_CALLNZ 113
/* gap */
#define TGSI_OPCODE_BREAKC 115
#define TGSI_OPCODE_KIL 116 /* conditional kill */
#define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
#define TGSI_OPCODE_END 117 /* aka HALT */
/* gap */
#define TGSI_OPCODE_F2I 119

6
src/mesa/state_tracker/st_glsl_to_tgsi.cpp
View File

@@ -2976,10 +2976,10 @@ glsl_to_tgsi_visitor::visit(ir_discard *ir)
if (ir->condition) {
ir->condition->accept(this);
this->result.negate = ~this->result.negate;
emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
} else {
/* unconditional kil */
emit(ir, TGSI_OPCODE_KILP);
emit(ir, TGSI_OPCODE_KILL);
}
}
@@ -4010,7 +4010,7 @@ get_bitmap_visitor(struct st_fragment_program *fp,
src0.negate = NEGATE_XYZW;
if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
src0.swizzle = SWIZZLE_XXXX;
inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
/* Now copy the instructions from the original glsl_to_tgsi_visitor into the
* new visitor. */

5
src/mesa/state_tracker/st_mesa_to_tgsi.c
View File

@@ -585,9 +585,10 @@ translate_opcode( unsigned op )
case OPCODE_TRUNC:
return TGSI_OPCODE_TRUNC;
case OPCODE_KIL:
return TGSI_OPCODE_KIL;
return TGSI_OPCODE_KILL_IF;
case OPCODE_KIL_NV:
return TGSI_OPCODE_KILP;
/* XXX we don't support condition codes in TGSI */
return TGSI_OPCODE_KILL;
case OPCODE_LG2:
return TGSI_OPCODE_LG2;
case OPCODE_LOG: