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intel/eu/validate/gen12: Implement integer multiply restrictions in EU validator.

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Due to hardware bug filed as HSDES#1604601757.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Francisco Jerez
2018-12-07 14:09:25 -08:00
parent f9ec4ac5a1
commit 45768e6b3c
1 changed files with 33 additions and 0 deletions
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33
src/intel/compiler/brw_eu_validate.c
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@@ -1824,6 +1824,38 @@ special_requirements_for_handling_double_precision_data_types(
return error_msg; return error_msg;
} }
static struct string
instruction_restrictions(const struct gen_device_info *devinfo,
const brw_inst *inst)
{
struct string error_msg = { .str = NULL, .len = 0 };
/* From GEN:BUG:1604601757:
*
* "When multiplying a DW and any lower precision integer, source modifier
* is not supported."
*/
if (devinfo->gen >= 12 &&
brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) {
enum brw_reg_type exec_type = execution_type(devinfo, inst);
const bool src0_valid = type_sz(brw_inst_src0_type(devinfo, inst)) == 4 ||
brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE ||
!(brw_inst_src0_negate(devinfo, inst) ||
brw_inst_src0_abs(devinfo, inst));
const bool src1_valid = type_sz(brw_inst_src1_type(devinfo, inst)) == 4 ||
brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE ||
!(brw_inst_src1_negate(devinfo, inst) ||
brw_inst_src1_abs(devinfo, inst));
ERROR_IF(!brw_reg_type_is_floating_point(exec_type) &&
type_sz(exec_type) == 4 && !(src0_valid && src1_valid),
"When multiplying a DW and any lower precision integer, source "
"modifier is not supported.");
}
return error_msg;
}
bool bool
brw_validate_instructions(const struct gen_device_info *devinfo, brw_validate_instructions(const struct gen_device_info *devinfo,
const void *assembly, int start_offset, int end_offset, const void *assembly, int start_offset, int end_offset,
@@ -1855,6 +1887,7 @@ brw_validate_instructions(const struct gen_device_info *devinfo,
CHECK(region_alignment_rules); CHECK(region_alignment_rules);
CHECK(vector_immediate_restrictions); CHECK(vector_immediate_restrictions);
CHECK(special_requirements_for_handling_double_precision_data_types); CHECK(special_requirements_for_handling_double_precision_data_types);
CHECK(instruction_restrictions);
} }
if (error_msg.str && disasm) { if (error_msg.str && disasm) {