nir: add a pass to convert to SSA
v2: Jason Ekstrand <jason.ekstrand@intel.com>: whitespace fixes
This commit is contained in:
Connor Abbott
committed by
Jason Ekstrand
Jason Ekstrand
parent
b559ee709b
commit
4553887d4a
682
src/glsl/nir/nir_to_ssa.c
Normal file
682
src/glsl/nir/nir_to_ssa.c
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@@ -0,0 +1,682 @@
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Connor Abbott (cwabbott0@gmail.com)
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*
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*/
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#include "nir.h"
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#include "malloc.h"
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#include <unistd.h>
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/*
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* Implements the classic to-SSA algorithm described by Cytron et. al. in
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* "Efficiently Computing Static Single Assignment Form and the Control
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* Dependence Graph."
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*/
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/* inserts a phi node of the form reg = phi(reg, reg, reg, ...) */
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static void
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insert_trivial_phi(nir_register *reg, nir_block *block, void *mem_ctx)
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{
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nir_phi_instr *instr = nir_phi_instr_create(mem_ctx);
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instr->dest.reg.reg = reg;
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struct set_entry *entry;
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set_foreach(block->predecessors, entry) {
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nir_block *pred = (nir_block *) entry->key;
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nir_phi_src *src = ralloc(mem_ctx, nir_phi_src);
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src->pred = pred;
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src->src.is_ssa = false;
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src->src.reg.base_offset = 0;
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src->src.reg.indirect = NULL;
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src->src.reg.reg = reg;
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exec_list_push_tail(&instr->srcs, &src->node);
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}
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nir_instr_insert_before_block(block, &instr->instr);
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}
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static void
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insert_phi_nodes(nir_function_impl *impl)
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{
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void *mem_ctx = ralloc_parent(impl);
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unsigned *work = calloc(impl->num_blocks, sizeof(unsigned));
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unsigned *has_already = calloc(impl->num_blocks, sizeof(unsigned));
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/*
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* Since the work flags already prevent us from inserting a node that has
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* ever been inserted into W, we don't need to use a set to represent W.
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* Also, since no block can ever be inserted into W more than once, we know
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* that the maximum size of W is the number of basic blocks in the
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* function. So all we need to handle W is an array and a pointer to the
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* next element to be inserted and the next element to be removed.
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*/
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nir_block **W = malloc(impl->num_blocks * sizeof(nir_block *));
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unsigned w_start, w_end;
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unsigned iter_count = 0;
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nir_index_blocks(impl);
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foreach_list_typed(nir_register, reg, node, &impl->registers) {
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if (reg->num_array_elems != 0)
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continue;
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w_start = w_end = 0;
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iter_count++;
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struct set_entry *entry;
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set_foreach(reg->defs, entry) {
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nir_instr *def = (nir_instr *) entry->key;
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if (work[def->block->index] < iter_count)
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W[w_end++] = def->block;
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work[def->block->index] = iter_count;
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}
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while (w_start != w_end) {
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nir_block *cur = W[w_start++];
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set_foreach(cur->dom_frontier, entry) {
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nir_block *next = (nir_block *) entry->key;
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/*
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* If there's more than one return statement, then the end block
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* can be a join point for some definitions. However, there are
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* no instructions in the end block, so nothing would use those
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* phi nodes. Of course, we couldn't place those phi nodes
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* anyways due to the restriction of having no instructions in the
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* end block...
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*/
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if (next == impl->end_block)
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continue;
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if (has_already[next->index] < iter_count) {
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insert_trivial_phi(reg, next, mem_ctx);
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has_already[next->index] = iter_count;
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if (work[next->index] < iter_count) {
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work[next->index] = iter_count;
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W[w_end++] = next;
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}
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}
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}
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}
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}
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free(work);
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free(has_already);
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free(W);
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}
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typedef struct {
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nir_ssa_def **stack;
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int index;
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unsigned num_defs; /** < used to add indices to debug names */
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#ifdef DEBUG
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unsigned stack_size;
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#endif
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} reg_state;
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typedef struct {
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reg_state *states;
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void *mem_ctx;
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nir_instr *parent_instr;
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nir_if *parent_if;
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nir_function_impl *impl;
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/* map from SSA value -> original register */
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struct hash_table *ssa_map;
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/* predicate for this instruction */
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nir_src *predicate;
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} rewrite_state;
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static nir_ssa_def *get_ssa_src(nir_register *reg, rewrite_state *state)
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{
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unsigned index = reg->index;
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if (state->states[index].index == -1) {
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/*
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* We're using an undefined register, create a new undefined SSA value
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* to preserve the information that this source is undefined
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*/
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nir_ssa_undef_instr *instr = nir_ssa_undef_instr_create(state->mem_ctx);
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instr->def.index = state->impl->ssa_alloc++;
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instr->def.num_components = reg->num_components;
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instr->def.uses = _mesa_set_create(state->mem_ctx,
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_mesa_key_pointer_equal);
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instr->def.if_uses = _mesa_set_create(state->mem_ctx,
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_mesa_key_pointer_equal);
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/*
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* We could just insert the undefined instruction before the instruction
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* we're rewriting, but we could be rewriting a phi source in which case
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* we can't do that, so do the next easiest thing - insert it at the
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* beginning of the program. In the end, it doesn't really matter where
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* the undefined instructions are because they're going to be ignored
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* in the backend.
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*/
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nir_instr_insert_before_cf_list(&state->impl->body, &instr->instr);
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return &instr->def;
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}
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return state->states[index].stack[state->states[index].index];
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}
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static bool
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rewrite_use(nir_src *src, void *_state)
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{
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rewrite_state *state = (rewrite_state *) _state;
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if (src->is_ssa)
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return true;
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unsigned index = src->reg.reg->index;
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if (state->states[index].stack == NULL)
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return true;
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src->is_ssa = true;
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src->ssa = get_ssa_src(src->reg.reg, state);
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if (state->parent_instr)
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_mesa_set_add(src->ssa->uses, _mesa_hash_pointer(state->parent_instr),
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state->parent_instr);
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else
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_mesa_set_add(src->ssa->if_uses, _mesa_hash_pointer(state->parent_if),
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state->parent_if);
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return true;
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}
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static bool
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rewrite_def_forwards(nir_dest *dest, void *_state)
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{
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rewrite_state *state = (rewrite_state *) _state;
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if (dest->is_ssa)
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return true;
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nir_register *reg = dest->reg.reg;
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unsigned index = reg->index;
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if (state->states[index].stack == NULL)
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return true;
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nir_alu_instr *csel = NULL;
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if (state->predicate) {
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/*
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* To capture the information that we may or may not overwrite this
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* register due to the predicate, we need to emit a conditional select
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* that takes the old version of the register and the new version.
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* This is basically a watered-down version of the Psi-SSA
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* representation, without any of the optimizations.
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*
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* TODO: do we actually need full-blown Psi-SSA?
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*/
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csel = nir_alu_instr_create(state->mem_ctx, nir_op_bcsel);
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csel->dest.dest.reg.reg = dest->reg.reg;
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csel->dest.write_mask = (1 << dest->reg.reg->num_components) - 1;
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csel->src[0].src = nir_src_copy(*state->predicate, state->mem_ctx);
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if (csel->src[0].src.is_ssa)
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_mesa_set_add(csel->src[0].src.ssa->uses,
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_mesa_hash_pointer(&csel->instr), &csel->instr);
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csel->src[2].src.is_ssa = true;
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csel->src[2].src.ssa = get_ssa_src(dest->reg.reg, state);
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_mesa_set_add(csel->src[2].src.ssa->uses,
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_mesa_hash_pointer(&csel->instr), &csel->instr);
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}
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dest->is_ssa = true;
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char *name = NULL;
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if (dest->reg.reg->name)
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name = ralloc_asprintf(state->mem_ctx, "%s_%u", dest->reg.reg->name,
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state->states[index].num_defs);
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dest->ssa.index = state->impl->ssa_alloc++;
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dest->ssa.num_components = reg->num_components;
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dest->ssa.parent_instr = state->parent_instr;
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dest->ssa.uses = _mesa_set_create(state->mem_ctx, _mesa_key_pointer_equal);
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dest->ssa.if_uses = _mesa_set_create(state->mem_ctx,
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_mesa_key_pointer_equal);
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dest->ssa.name = name;
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/* push our SSA destination on the stack */
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state->states[index].index++;
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assert(state->states[index].index < state->states[index].stack_size);
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state->states[index].stack[state->states[index].index] = &dest->ssa;
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state->states[index].num_defs++;
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_mesa_hash_table_insert(state->ssa_map, &dest->ssa, reg);
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if (state->predicate) {
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csel->src[1].src.is_ssa = true;
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csel->src[1].src.ssa = &dest->ssa;
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_mesa_set_add(dest->ssa.uses, _mesa_hash_pointer(&csel->instr),
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&csel->instr);
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nir_instr *old_parent_instr = state->parent_instr;
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nir_src *old_predicate = state->predicate;
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state->parent_instr = &csel->instr;
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state->predicate = NULL;
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rewrite_def_forwards(&csel->dest.dest, state);
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state->parent_instr = old_parent_instr;
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state->predicate = old_predicate;
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nir_instr_insert_after(state->parent_instr, &csel->instr);
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}
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return true;
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}
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static void
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rewrite_alu_instr_forward(nir_alu_instr *instr, rewrite_state *state)
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{
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state->parent_instr = &instr->instr;
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state->predicate = instr->has_predicate ? &instr->predicate : NULL;
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nir_foreach_src(&instr->instr, rewrite_use, state);
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nir_register *reg = instr->dest.dest.reg.reg;
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unsigned index = reg->index;
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if (state->states[index].stack == NULL)
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return;
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unsigned write_mask = instr->dest.write_mask;
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if (write_mask != (1 << instr->dest.dest.reg.reg->num_components) - 1) {
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/*
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* Calculate the number of components the final instruction, which for
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* per-component things is the number of output components of the
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* instruction and non-per-component things is the number of enabled
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* channels in the write mask.
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*/
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unsigned num_components;
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if (nir_op_infos[instr->op].output_size == 0) {
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unsigned temp = (write_mask & 0x5) + ((write_mask >> 1) & 0x5);
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num_components = (temp & 0x3) + ((temp >> 2) & 0x3);
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} else {
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num_components = nir_op_infos[instr->op].output_size;
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}
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char *name = NULL;
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if (instr->dest.dest.reg.reg->name)
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name = ralloc_asprintf(state->mem_ctx, "%s_%u",
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reg->name, state->states[index].num_defs);
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instr->dest.write_mask = (1 << num_components) - 1;
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instr->dest.dest.is_ssa = true;
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instr->dest.dest.ssa.index = state->impl->ssa_alloc++;
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instr->dest.dest.ssa.num_components = num_components;
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instr->dest.dest.ssa.name = name;
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instr->dest.dest.ssa.parent_instr = &instr->instr;
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instr->dest.dest.ssa.uses = _mesa_set_create(state->mem_ctx,
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_mesa_key_pointer_equal);
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instr->dest.dest.ssa.if_uses = _mesa_set_create(state->mem_ctx,
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_mesa_key_pointer_equal);
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if (nir_op_infos[instr->op].output_size == 0) {
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/*
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* When we change the output writemask, we need to change the
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* swizzles for per-component inputs too
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*/
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for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
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if (nir_op_infos[instr->op].input_sizes[i] != 0)
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continue;
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unsigned new_swizzle[4] = {0, 0, 0, 0};
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/*
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* We keep two indices:
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* 1. The index of the original (non-SSA) component
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* 2. The index of the post-SSA, compacted, component
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*
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* We need to map the swizzle component at index 1 to the swizzle
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* component at index 2.
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*/
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unsigned ssa_index = 0;
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for (unsigned index = 0; index < 4; index++) {
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if (!((write_mask >> index) & 1))
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continue;
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new_swizzle[ssa_index] = instr->src[i].swizzle[index];
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ssa_index++;
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}
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for (unsigned j = 0; j < 4; j++)
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instr->src[i].swizzle[j] = new_swizzle[j];
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}
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}
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nir_op op;
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switch (reg->num_components) {
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case 2: op = nir_op_vec2; break;
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case 3: op = nir_op_vec3; break;
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case 4: op = nir_op_vec4; break;
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default: assert(0); break;
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}
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nir_alu_instr *vec = nir_alu_instr_create(state->mem_ctx, op);
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vec->dest.dest.reg.reg = reg;
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vec->dest.write_mask = (1 << reg->num_components) - 1;
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nir_ssa_def *old_src = get_ssa_src(reg, state);
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nir_ssa_def *new_src = &instr->dest.dest.ssa;
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unsigned ssa_index = 0;
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for (unsigned i = 0; i < reg->num_components; i++) {
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vec->src[i].src.is_ssa = true;
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if ((write_mask >> i) & 1) {
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vec->src[i].src.ssa = new_src;
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if (nir_op_infos[instr->op].output_size == 0)
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vec->src[i].swizzle[0] = ssa_index;
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else
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vec->src[i].swizzle[0] = i;
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ssa_index++;
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} else {
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vec->src[i].src.ssa = old_src;
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vec->src[i].swizzle[0] = i;
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}
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_mesa_set_add(vec->src[i].src.ssa->uses,
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_mesa_hash_pointer(&vec->instr), &vec->instr);
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}
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vec->has_predicate = instr->has_predicate;
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if (instr->has_predicate) {
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vec->predicate = nir_src_copy(instr->predicate, state->mem_ctx);
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if (vec->predicate.is_ssa)
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_mesa_set_add(vec->predicate.ssa->uses,
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_mesa_hash_pointer(&vec->instr), &vec->instr);
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}
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nir_instr_insert_after(&instr->instr, &vec->instr);
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state->parent_instr = &vec->instr;
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state->predicate = vec->has_predicate ? &vec->predicate : NULL;
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rewrite_def_forwards(&vec->dest.dest, state);
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} else {
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rewrite_def_forwards(&instr->dest.dest, state);
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}
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}
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static void
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rewrite_phi_instr(nir_phi_instr *instr, rewrite_state *state)
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{
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state->parent_instr = &instr->instr;
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state->predicate = NULL;
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rewrite_def_forwards(&instr->dest, state);
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}
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static nir_src *
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get_instr_predicate(nir_instr *instr)
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{
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nir_alu_instr *alu_instr;
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nir_load_const_instr *load_const_instr;
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nir_intrinsic_instr *intrinsic_instr;
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nir_tex_instr *tex_instr;
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switch (instr->type) {
|
||||
case nir_instr_type_alu:
|
||||
alu_instr = nir_instr_as_alu(instr);
|
||||
if (alu_instr->has_predicate)
|
||||
return &alu_instr->predicate;
|
||||
else
|
||||
return NULL;
|
||||
|
||||
case nir_instr_type_load_const:
|
||||
load_const_instr = nir_instr_as_load_const(instr);
|
||||
if (load_const_instr->has_predicate)
|
||||
return &load_const_instr->predicate;
|
||||
else
|
||||
return NULL;
|
||||
|
||||
case nir_instr_type_intrinsic:
|
||||
intrinsic_instr = nir_instr_as_intrinsic(instr);
|
||||
if (intrinsic_instr->has_predicate)
|
||||
return &intrinsic_instr->predicate;
|
||||
else
|
||||
return NULL;
|
||||
|
||||
case nir_instr_type_texture:
|
||||
tex_instr = nir_instr_as_texture(instr);
|
||||
if (tex_instr->has_predicate)
|
||||
return &tex_instr->predicate;
|
||||
else
|
||||
return NULL;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void
|
||||
rewrite_instr_forward(nir_instr *instr, rewrite_state *state)
|
||||
{
|
||||
if (instr->type == nir_instr_type_alu) {
|
||||
rewrite_alu_instr_forward(nir_instr_as_alu(instr), state);
|
||||
return;
|
||||
}
|
||||
|
||||
if (instr->type == nir_instr_type_phi) {
|
||||
rewrite_phi_instr(nir_instr_as_phi(instr), state);
|
||||
return;
|
||||
}
|
||||
|
||||
state->parent_instr = instr;
|
||||
state->predicate = get_instr_predicate(instr);
|
||||
|
||||
nir_foreach_src(instr, rewrite_use, state);
|
||||
nir_foreach_dest(instr, rewrite_def_forwards, state);
|
||||
}
|
||||
|
||||
static void
|
||||
rewrite_phi_sources(nir_block *block, nir_block *pred, rewrite_state *state)
|
||||
{
|
||||
nir_foreach_instr(block, instr) {
|
||||
if (instr->type != nir_instr_type_phi)
|
||||
break;
|
||||
|
||||
nir_phi_instr *phi_instr = nir_instr_as_phi(instr);
|
||||
|
||||
state->parent_instr = instr;
|
||||
|
||||
foreach_list_typed(nir_phi_src, src, node, &phi_instr->srcs) {
|
||||
if (src->pred == pred) {
|
||||
rewrite_use(&src->src, state);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static bool
|
||||
rewrite_def_backwards(nir_dest *dest, void *_state)
|
||||
{
|
||||
rewrite_state *state = (rewrite_state *) _state;
|
||||
|
||||
if (!dest->is_ssa)
|
||||
return true;
|
||||
|
||||
struct hash_entry *entry =
|
||||
_mesa_hash_table_search(state->ssa_map, &dest->ssa);
|
||||
|
||||
if (!entry)
|
||||
return true;
|
||||
|
||||
nir_register *reg = (nir_register *) entry->data;
|
||||
unsigned index = reg->index;
|
||||
|
||||
state->states[index].index--;
|
||||
assert(state->states[index].index >= -1);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void
|
||||
rewrite_instr_backwards(nir_instr *instr, rewrite_state *state)
|
||||
{
|
||||
nir_foreach_dest(instr, rewrite_def_backwards, state);
|
||||
}
|
||||
|
||||
static void
|
||||
rewrite_block(nir_block *block, rewrite_state *state)
|
||||
{
|
||||
/* This will skip over any instructions after the current one, which is
|
||||
* what we want because those instructions (vector gather, conditional
|
||||
* select) will already be in SSA form.
|
||||
*/
|
||||
nir_foreach_instr_safe(block, instr) {
|
||||
rewrite_instr_forward(instr, state);
|
||||
}
|
||||
|
||||
if (block != state->impl->end_block &&
|
||||
!nir_cf_node_is_last(&block->cf_node) &&
|
||||
nir_cf_node_next(&block->cf_node)->type == nir_cf_node_if) {
|
||||
nir_if *if_stmt = nir_cf_node_as_if(nir_cf_node_next(&block->cf_node));
|
||||
state->parent_instr = NULL;
|
||||
state->parent_if = if_stmt;
|
||||
rewrite_use(&if_stmt->condition, state);
|
||||
}
|
||||
|
||||
if (block->successors[0])
|
||||
rewrite_phi_sources(block->successors[0], block, state);
|
||||
if (block->successors[1])
|
||||
rewrite_phi_sources(block->successors[1], block, state);
|
||||
|
||||
for (unsigned i = 0; i < block->num_dom_children; i++)
|
||||
rewrite_block(block->dom_children[i], state);
|
||||
|
||||
nir_foreach_instr_reverse(block, instr) {
|
||||
rewrite_instr_backwards(instr, state);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
remove_unused_regs(nir_function_impl *impl, rewrite_state *state)
|
||||
{
|
||||
foreach_list_typed_safe(nir_register, reg, node, &impl->registers) {
|
||||
if (state->states[reg->index].stack != NULL)
|
||||
exec_node_remove(®->node);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
init_rewrite_state(nir_function_impl *impl, rewrite_state *state)
|
||||
{
|
||||
state->impl = impl;
|
||||
state->mem_ctx = ralloc_parent(impl);
|
||||
state->ssa_map = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
|
||||
_mesa_key_pointer_equal);
|
||||
state->states = ralloc_array(NULL, reg_state, impl->reg_alloc);
|
||||
|
||||
foreach_list_typed(nir_register, reg, node, &impl->registers) {
|
||||
assert(reg->index < impl->reg_alloc);
|
||||
if (reg->num_array_elems > 0) {
|
||||
state->states[reg->index].stack = NULL;
|
||||
} else {
|
||||
/*
|
||||
* Calculate a conservative estimate of the stack size based on the
|
||||
* number of definitions there are. Note that this function *must* be
|
||||
* called after phi nodes are inserted so we can count phi node
|
||||
* definitions too.
|
||||
*/
|
||||
unsigned stack_size = 0;
|
||||
struct set_entry *entry;
|
||||
set_foreach(reg->defs, entry) {
|
||||
nir_instr *def = (nir_instr *) entry->key;
|
||||
|
||||
stack_size++;
|
||||
|
||||
/*
|
||||
* predicates generate an additional predicate destination that
|
||||
* gets pushed on the stack
|
||||
*
|
||||
* Note: ALU instructions generate an additional instruction too,
|
||||
* but as of now only the additional instruction is pushed onto
|
||||
* the stack, and not the original instruction because it doesn't
|
||||
* need to be (actually, we could do the same with predicates,
|
||||
* but it was easier to just use the existing codepath).
|
||||
*/
|
||||
|
||||
if (def->type == nir_instr_type_intrinsic) {
|
||||
nir_intrinsic_instr *intrinsic_instr =
|
||||
nir_instr_as_intrinsic(def);
|
||||
if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest &&
|
||||
intrinsic_instr->has_predicate)
|
||||
stack_size++;
|
||||
} else {
|
||||
if (get_instr_predicate(def) != NULL)
|
||||
stack_size++;
|
||||
}
|
||||
}
|
||||
|
||||
state->states[reg->index].stack = ralloc_array(state->states,
|
||||
nir_ssa_def *,
|
||||
stack_size);
|
||||
#ifdef DEBUG
|
||||
state->states[reg->index].stack_size = stack_size;
|
||||
#endif
|
||||
state->states[reg->index].index = -1;
|
||||
state->states[reg->index].num_defs = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
destroy_rewrite_state(rewrite_state *state)
|
||||
{
|
||||
_mesa_hash_table_destroy(state->ssa_map, NULL);
|
||||
ralloc_free(state->states);
|
||||
}
|
||||
|
||||
void
|
||||
nir_convert_to_ssa_impl(nir_function_impl *impl)
|
||||
{
|
||||
nir_calc_dominance_impl(impl);
|
||||
|
||||
insert_phi_nodes(impl);
|
||||
|
||||
rewrite_state state;
|
||||
init_rewrite_state(impl, &state);
|
||||
|
||||
rewrite_block(impl->start_block, &state);
|
||||
|
||||
remove_unused_regs(impl, &state);
|
||||
|
||||
destroy_rewrite_state(&state);
|
||||
}
|
||||
|
||||
void
|
||||
nir_convert_to_ssa(nir_shader *shader)
|
||||
{
|
||||
nir_foreach_overload(shader, overload) {
|
||||
if (overload->impl)
|
||||
nir_convert_to_ssa_impl(overload->impl);
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user