intel/compiler: Delete abs/neg handling in fsign code
This should have gone away when removing source modifiers. They won't
be set any longer, so this is simply dead code.
Fixes: b7c47c4f7c
("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4691>
This commit is contained in:
@@ -879,35 +879,9 @@ fs_visitor::emit_fsign(const fs_builder &bld, const nir_alu_instr *instr,
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}
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op[0] = offset(op[0], bld, fsign_instr->src[0].swizzle[channel]);
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/* Resolve any source modifiers. We could do slightly better on Gen8+
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* if the only source modifier is negation, but *shrug*.
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*/
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if (op[1].negate || op[1].abs) {
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fs_reg tmp = bld.vgrf(op[1].type);
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bld.MOV(tmp, op[1]);
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op[1] = tmp;
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}
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}
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if (op[0].abs) {
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/* Straightforward since the source can be assumed to be either strictly
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* >= 0 or strictly <= 0 depending on the setting of the negate flag.
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*/
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set_condmod(BRW_CONDITIONAL_NZ, bld.MOV(result, op[0]));
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if (instr->op == nir_op_fsign) {
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inst = (op[0].negate)
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? bld.MOV(result, brw_imm_f(-1.0f))
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: bld.MOV(result, brw_imm_f(1.0f));
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} else {
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op[1].negate = (op[0].negate != op[1].negate);
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inst = bld.MOV(result, op[1]);
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}
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set_predicate(BRW_PREDICATE_NORMAL, inst);
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} else if (type_sz(op[0].type) == 2) {
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if (type_sz(op[0].type) == 2) {
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/* AND(val, 0x8000) gives the sign bit.
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*
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* Predicated OR ORs 1.0 (0x3c00) with the sign bit if val is not zero.
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@@ -1788,19 +1788,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
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unreachable("not reached: should have been lowered");
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case nir_op_fsign:
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if (op[0].abs) {
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/* Straightforward since the source can be assumed to be either
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* strictly >= 0 or strictly <= 0 depending on the setting of the
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* negate flag.
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*/
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inst = emit(MOV(dst, op[0]));
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inst->conditional_mod = BRW_CONDITIONAL_NZ;
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inst = (op[0].negate)
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? emit(MOV(dst, brw_imm_f(-1.0f)))
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: emit(MOV(dst, brw_imm_f(1.0f)));
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inst->predicate = BRW_PREDICATE_NORMAL;
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} else if (type_sz(op[0].type) < 8) {
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if (type_sz(op[0].type) < 8) {
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/* AND(val, 0x80000000) gives the sign bit.
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*
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* Predicated OR ORs 1.0 (0x3f800000) with the sign bit if val is not
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