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radv: pass radv_shader to radv_dump_shader_stats()

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Preliminary work for moving the shaders array outside of radv_pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21878>
This commit is contained in:
Samuel Pitoiset
2023-03-13 13:32:23 +01:00
committed by Marge Bot
parent 0514c015e6
commit 444c5887c2
5 changed files with 8 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/vulkan/radv_debug.c
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@@ -452,7 +452,7 @@ radv_dump_shader(struct radv_pipeline *pipeline, struct radv_shader *shader,
shader->ir_string); shader->ir_string);
fprintf(f, "DISASM:\n%s\n", shader->disasm_string); fprintf(f, "DISASM:\n%s\n", shader->disasm_string);
radv_dump_shader_stats(pipeline->device, pipeline, stage, f); radv_dump_shader_stats(pipeline->device, pipeline, shader, stage, f);
} }
static void static void

5
src/amd/vulkan/radv_pipeline.c
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@@ -3552,7 +3552,7 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline,
free(binaries[i]); free(binaries[i]);
if (stages[i].nir) { if (stages[i].nir) {
if (radv_can_dump_shader_stats(device, stages[i].nir) && pipeline->base.shaders[i]) { if (radv_can_dump_shader_stats(device, stages[i].nir) && pipeline->base.shaders[i]) {
radv_dump_shader_stats(device, &pipeline->base, i, stderr); radv_dump_shader_stats(device, &pipeline->base, pipeline->base.shaders[i], i, stderr);
} }
ralloc_free(stages[i].nir); ralloc_free(stages[i].nir);
@@ -5412,7 +5412,8 @@ radv_compute_pipeline_compile(struct radv_compute_pipeline *pipeline,
free(binaries[MESA_SHADER_COMPUTE]); free(binaries[MESA_SHADER_COMPUTE]);
if (radv_can_dump_shader_stats(device, cs_stage.nir)) { if (radv_can_dump_shader_stats(device, cs_stage.nir)) {
radv_dump_shader_stats(device, &pipeline->base, MESA_SHADER_COMPUTE, stderr); radv_dump_shader_stats(device, &pipeline->base, pipeline->base.shaders[MESA_SHADER_COMPUTE],
MESA_SHADER_COMPUTE, stderr);
} }
ralloc_free(cs_stage.nir); ralloc_free(cs_stage.nir);

3
src/amd/vulkan/radv_pipeline_rt.c
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@@ -311,7 +311,8 @@ radv_rt_pipeline_compile(struct radv_pipeline *pipeline,
free(binaries[rt_stage.stage]); free(binaries[rt_stage.stage]);
if (radv_can_dump_shader_stats(device, rt_stage.nir)) { if (radv_can_dump_shader_stats(device, rt_stage.nir)) {
radv_dump_shader_stats(device, pipeline, rt_stage.stage, stderr); radv_dump_shader_stats(device, pipeline, pipeline->shaders[rt_stage.stage], rt_stage.stage,
stderr);
} }
ralloc_free(rt_stage.nir); ralloc_free(rt_stage.nir);

3
src/amd/vulkan/radv_shader.c
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@@ -3230,9 +3230,8 @@ radv_compute_spi_ps_input(const struct radv_pipeline_key *pipeline_key,
VkResult VkResult
radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline, radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline,
gl_shader_stage stage, FILE *output) struct radv_shader *shader, gl_shader_stage stage, FILE *output)
{ {
struct radv_shader *shader = pipeline->shaders[stage];
VkPipelineExecutablePropertiesKHR *props = NULL; VkPipelineExecutablePropertiesKHR *props = NULL;
uint32_t prop_count = 0; uint32_t prop_count = 0;
VkResult result; VkResult result;

2
src/amd/vulkan/radv_shader.h
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@@ -650,7 +650,7 @@ bool radv_can_dump_shader(struct radv_device *device, nir_shader *nir, bool meta
bool radv_can_dump_shader_stats(struct radv_device *device, nir_shader *nir); bool radv_can_dump_shader_stats(struct radv_device *device, nir_shader *nir);
VkResult radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline, VkResult radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline,
gl_shader_stage stage, FILE *output); struct radv_shader *shader, gl_shader_stage stage, FILE *output);
static inline struct radv_shader * static inline struct radv_shader *
radv_shader_ref(struct radv_shader *shader) radv_shader_ref(struct radv_shader *shader)