nir/spirv: Translate SPIR-V to NIR for new INTEL_shader_integer_functions2 opcodes
v2: Rebase on 272e927d0e
("nir/spirv: initial handling of OpenCL.std
extension opcodes")
v3: Add missing SpvOpUCountTrailingZerosINTEL case to switch in
vtn_handle_body_instruction. Remove stray semicolon in
vtn_nir_alu_op_for_spirv_opcode. Use umin instead of umax for
SpvOpUCountTrailingZerosINTEL "lowering" in vtn_handle_alu.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
This commit is contained in:
@@ -4925,6 +4925,20 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
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case SpvOpVectorTimesMatrix:
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case SpvOpMatrixTimesVector:
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case SpvOpMatrixTimesMatrix:
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case SpvOpUCountLeadingZerosINTEL:
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case SpvOpUCountTrailingZerosINTEL:
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case SpvOpAbsISubINTEL:
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case SpvOpAbsUSubINTEL:
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case SpvOpIAddSatINTEL:
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case SpvOpUAddSatINTEL:
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case SpvOpIAverageINTEL:
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case SpvOpUAverageINTEL:
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case SpvOpIAverageRoundedINTEL:
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case SpvOpUAverageRoundedINTEL:
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case SpvOpISubSatINTEL:
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case SpvOpUSubSatINTEL:
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case SpvOpIMul32x16INTEL:
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case SpvOpUMul32x16INTEL:
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vtn_handle_alu(b, opcode, w, count);
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break;
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@@ -261,6 +261,21 @@ vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder *b,
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case SpvOpBitReverse: return nir_op_bitfield_reverse;
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case SpvOpBitCount: return nir_op_bit_count;
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case SpvOpUCountLeadingZerosINTEL: return nir_op_uclz;
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/* SpvOpUCountTrailingZerosINTEL is handled elsewhere. */
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case SpvOpAbsISubINTEL: return nir_op_uabs_isub;
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case SpvOpAbsUSubINTEL: return nir_op_uabs_usub;
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case SpvOpIAddSatINTEL: return nir_op_iadd_sat;
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case SpvOpUAddSatINTEL: return nir_op_uadd_sat;
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case SpvOpIAverageINTEL: return nir_op_ihadd;
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case SpvOpUAverageINTEL: return nir_op_uhadd;
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case SpvOpIAverageRoundedINTEL: return nir_op_irhadd;
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case SpvOpUAverageRoundedINTEL: return nir_op_urhadd;
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case SpvOpISubSatINTEL: return nir_op_isub_sat;
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case SpvOpUSubSatINTEL: return nir_op_usub_sat;
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case SpvOpIMul32x16INTEL: return nir_op_imul_32x16;
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case SpvOpUMul32x16INTEL: return nir_op_umul_32x16;
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/* The ordered / unordered operators need special implementation besides
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* the logical operator to use since they also need to check if operands are
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* ordered.
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@@ -640,6 +655,12 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
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break;
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}
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case SpvOpUCountTrailingZerosINTEL:
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val->ssa->def = nir_umin(&b->nb,
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nir_find_lsb(&b->nb, src[0]),
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nir_imm_int(&b->nb, 32u));
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break;
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default: {
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bool swap;
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unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
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