radv: Add export_prim_id to the shader variant info.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
@@ -3973,6 +3973,7 @@ ac_fill_shader_info(struct radv_shader_variant_info *shader_info, struct nir_sha
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shader_info->tes.ccw = nir->info.tess.ccw;
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shader_info->tes.point_mode = nir->info.tess.point_mode;
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shader_info->tes.as_es = options->key.tes.as_es;
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shader_info->tes.export_prim_id = options->key.tes.export_prim_id;
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break;
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case MESA_SHADER_TESS_CTRL:
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shader_info->tcs.tcs_vertices_out = nir->info.tess.tcs_vertices_out;
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@@ -3980,6 +3981,7 @@ ac_fill_shader_info(struct radv_shader_variant_info *shader_info, struct nir_sha
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case MESA_SHADER_VERTEX:
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shader_info->vs.as_es = options->key.vs.as_es;
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shader_info->vs.as_ls = options->key.vs.as_ls;
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shader_info->vs.export_prim_id = options->key.vs.export_prim_id;
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break;
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default:
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break;
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@@ -501,7 +501,7 @@ radv_fill_shader_variant(struct radv_device *device,
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assert(device->physical_device->rad_info.chip_class <= GFX8);
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vgpr_comp_cnt = info->uses_prim_id ? 3 : 2;
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} else {
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bool enable_prim_id = options->key.tes.export_prim_id || info->uses_prim_id;
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bool enable_prim_id = variant->info.tes.export_prim_id || info->uses_prim_id;
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vgpr_comp_cnt = enable_prim_id ? 3 : 2;
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}
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variant->config.rsrc2 |= S_00B12C_OC_LDS_EN(1);
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@@ -534,7 +534,7 @@ radv_fill_shader_variant(struct radv_device *device,
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* If PrimID is disabled. InstanceID / StepRate1 is loaded instead.
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* StepRate0 is set to 1. so that VGPR3 doesn't have to be loaded.
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*/
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if (options->key.vs.export_prim_id) {
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if (variant->info.vs.export_prim_id) {
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vgpr_comp_cnt = 2;
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} else if (info->vs.needs_instance_id) {
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vgpr_comp_cnt = 1;
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@@ -268,6 +268,7 @@ struct radv_shader_variant_info {
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struct radv_es_output_info es_info;
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bool as_es;
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bool as_ls;
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bool export_prim_id;
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} vs;
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struct {
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unsigned num_interp;
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@@ -302,6 +303,7 @@ struct radv_shader_variant_info {
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enum gl_tess_spacing spacing;
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bool ccw;
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bool point_mode;
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bool export_prim_id;
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} tes;
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};
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};
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