nir: Add AMD-specific byte and lane permute intrinsics.
These map directly to v_perm_b32 and v_permlane_b32. Unfortunately there is no corresponding NIR opcode or intrinsics, and it's too tedious to puzzle these things together from the existing NIR instructions. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>
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@@ -294,6 +294,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
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case nir_intrinsic_quad_swap_horizontal:
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case nir_intrinsic_quad_swap_vertical:
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case nir_intrinsic_quad_swap_diagonal:
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case nir_intrinsic_byte_permute_amd:
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case nir_intrinsic_load_deref:
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case nir_intrinsic_load_shared:
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case nir_intrinsic_load_global:
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@@ -496,6 +497,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
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case nir_intrinsic_ballot_bit_count_inclusive:
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case nir_intrinsic_write_invocation_amd:
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case nir_intrinsic_mbcnt_amd:
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case nir_intrinsic_lane_permute_16_amd:
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case nir_intrinsic_elect:
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case nir_intrinsic_load_tlb_color_v3d:
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case nir_intrinsic_load_tess_rel_patch_id_amd:
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