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radv: cleanup enabling TC-compat HTILE for depth surfaces

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It makes more sense to try to enable TC-compat if the image has HTILE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9405>
This commit is contained in:
Samuel Pitoiset
2021-03-04 08:51:15 +01:00
parent 55b57db84d
commit 438f65fb1e
1 changed files with 7 additions and 4 deletions
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11
src/amd/vulkan/radv_image.c
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@@ -476,11 +476,14 @@ radv_get_surface_flags(struct radv_device *device,
if (is_depth) {
flags |= RADEON_SURF_ZBUFFER;
if (!radv_use_htile_for_image(device, image) ||
(device->instance->debug_flags & RADV_DEBUG_NO_HIZ))
if (radv_use_htile_for_image(device, image) &&
!(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
if (radv_use_tc_compat_htile_for_image(device, pCreateInfo, image_format))
flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
} else {
flags |= RADEON_SURF_NO_HTILE;
if (radv_use_tc_compat_htile_for_image(device, pCreateInfo, image_format))
flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
}
}
if (is_stencil)