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radeonsi: use SPI_SHADER_USER_DATA_HS_0 definition instead of LS_0

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The value is the same, but LS_0 is for gfx9 only, and HS_0 is for everything
except gfx9.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
This commit is contained in:
Marek Olšák
2023-02-18 00:09:00 -05:00
committed by Marge Bot
parent 6dcd60206a
commit 429f43f088
2 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/radeonsi/si_descriptors.c
View File

@@ -2713,7 +2713,7 @@ void si_init_all_descriptors(struct si_context *sctx)
if (is_2nd) {
if (i == PIPE_SHADER_TESS_CTRL) {
rel_dw_offset =
(hs_sgpr0 - R_00B430_SPI_SHADER_USER_DATA_LS_0) / 4;
(hs_sgpr0 - R_00B430_SPI_SHADER_USER_DATA_HS_0) / 4;
} else if (sctx->gfx_level >= GFX10) { /* PIPE_SHADER_GEOMETRY */
rel_dw_offset =
(gs_sgpr0 - R_00B230_SPI_SHADER_USER_DATA_GS_0) / 4;
@@ -2733,7 +2733,7 @@ void si_init_all_descriptors(struct si_context *sctx)
if (is_2nd) {
if (i == PIPE_SHADER_TESS_CTRL) {
rel_dw_offset =
(hs_sgpr0 + 4 - R_00B430_SPI_SHADER_USER_DATA_LS_0) / 4;
(hs_sgpr0 + 4 - R_00B430_SPI_SHADER_USER_DATA_HS_0) / 4;
} else if (sctx->gfx_level >= GFX10) { /* PIPE_SHADER_GEOMETRY */
rel_dw_offset =
(gs_sgpr0 + 4 - R_00B230_SPI_SHADER_USER_DATA_GS_0) / 4;

2
src/gallium/drivers/radeonsi/si_state_draw.cpp
View File

@@ -836,7 +836,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx)
/* Set userdata SGPRs for merged LS-HS. */
radeon_set_sh_reg_seq(
R_00B430_SPI_SHADER_USER_DATA_LS_0 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT * 4, 3);
R_00B430_SPI_SHADER_USER_DATA_HS_0 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT * 4, 3);
radeon_emit(offchip_layout);
radeon_emit(tcs_out_offsets);
radeon_emit(tcs_out_layout);