diff --git a/src/intel/common/meson.build b/src/intel/common/meson.build index 491ed159c01..9ca00e01dad 100644 --- a/src/intel/common/meson.build +++ b/src/intel/common/meson.build @@ -132,7 +132,7 @@ if with_tests and not with_platform_android 'genxml_test', ['tests/genxml_test.c', gentest_pack], include_directories : [inc_include, inc_src, inc_intel], - dependencies : [idep_mesautil, idep_intel_dev], + dependencies : [idep_mesautil, idep_intel_dev, idep_genxml], link_with : libintel_common, c_args : [ '-DGENXML_DIR="@0@"'.format(fs.parent(genxml_path)), diff --git a/src/intel/genxml/genX_cl_helpers.h b/src/intel/genxml/genX_cl_helpers.h new file mode 100644 index 00000000000..c1321bb868b --- /dev/null +++ b/src/intel/genxml/genX_cl_helpers.h @@ -0,0 +1,182 @@ +/* Copyright © 2023 Intel Corporation + * SPDX-License-Identifier: MIT + */ + +#ifndef __GENX_CL_HELPERS_H__ +#define __GENX_CL_HELPERS_H__ + +#define ALWAYS_INLINE inline __attribute__((always_inline)) +#define UNUSED +#define BITFIELD64_MASK(bits) ((1ul << bits) - 1) +#define CLAMP( X, MIN, MAX ) ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) ) +#define INT64_MAX (0x7FFFFFFFFFFFFFFFL) + +ALWAYS_INLINE static uint64_t +u_uintN_max(uint32_t bits) +{ + return (1ul << bits) - 1; +} + +ALWAYS_INLINE static int64_t +u_intN_max(uint32_t bit_size) +{ + return INT64_MAX >> (64 - bit_size); +} + +ALWAYS_INLINE static int64_t +u_intN_min(uint32_t bit_size) +{ + /* On 2's compliment platforms, which is every platform Mesa is likely to + * every worry about, stdint.h generally calculated INT##_MIN in this + * manner. + */ + return (-u_intN_max(bit_size)) - 1; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_uint(uint64_t v, uint32_t start, UNUSED uint32_t end) +{ + return v << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_uint_nonzero(uint64_t v, uint32_t start, uint32_t end) +{ + return util_bitpack_uint(v, start, end); +} + +ALWAYS_INLINE static uint64_t +util_bitpack_sint(int64_t v, uint32_t start, uint32_t end) +{ + int32_t bits = end - start + 1; + + uint64_t mask = BITFIELD64_MASK(bits); + + return (v & mask) << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_sint_nonzero(int64_t v, uint32_t start, uint32_t end) +{ + return util_bitpack_sint(v, start, end); +} + +ALWAYS_INLINE static uint32_t +util_bitpack_float(float v) +{ + union { float f; uint32_t dw; } x; + x.f = v; + return x.dw; +} + +ALWAYS_INLINE static uint32_t +util_bitpack_float_nonzero(float v) +{ + return util_bitpack_float(v); +} + +ALWAYS_INLINE static uint64_t +util_bitpack_sfixed(float v, uint32_t start, uint32_t end, + uint32_t fract_bits) +{ + float factor = (1 << fract_bits); + + int64_t int_val = round(v * factor); + uint64_t mask = ~0ul >> (64 - (end - start + 1)); + + return (int_val & mask) << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_sfixed_clamp(float v, uint32_t start, uint32_t end, + uint32_t fract_bits) +{ + float factor = (1 << fract_bits); + + uint32_t total_bits = end - start + 1; + float min = u_intN_min(total_bits) / factor; + float max = u_intN_max(total_bits) / factor; + + int64_t int_val = round(CLAMP(v, min, max) * factor); + uint64_t mask = ~0ul >> (64 - (end - start + 1)); + + return (int_val & mask) << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_sfixed_nonzero(float v, uint32_t start, uint32_t end, + uint32_t fract_bits) +{ + return util_bitpack_sfixed(v, start, end, fract_bits); +} + +ALWAYS_INLINE static uint64_t +util_bitpack_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + float factor = (1 << fract_bits); + + uint64_t uint_val = round(v * factor); + + return uint_val << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_ufixed_clamp(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + float factor = (1 << fract_bits); + + int total_bits = end - start + 1; + float min = 0.0f; + float max = u_uintN_max(total_bits) / factor; + + uint64_t uint_val = round(CLAMP(v, min, max) * factor); + + return uint_val << start; +} + +ALWAYS_INLINE static uint64_t +util_bitpack_ufixed_nonzero(float v, uint32_t start, uint32_t end, + uint32_t fract_bits) +{ + return util_bitpack_ufixed(v, start, end, fract_bits); +} + +#ifndef __gen_validate_value +#define __gen_validate_value(x) +#endif + +#ifndef __intel_field_functions +#define __intel_field_functions +#endif + +#ifdef NDEBUG +#define NDEBUG_UNUSED __attribute__((unused)) +#else +#define NDEBUG_UNUSED +#endif + +static inline __attribute__((always_inline)) uint64_t +__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) +{ + return v; +} + +static inline __attribute__((always_inline)) uint64_t +__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end) +{ + return __gen_offset(v, start, end); +} + +static inline __attribute__((always_inline)) uint64_t +__gen_address(uint64_t address, + __attribute__((unused)) uint32_t start, uint32_t end) +{ + if (end < 63) { + uint32_t shift = 63 - end; + return (address << shift) >> shift; + } else { + return address; + } +} + +#endif /* __GENX_CL_HELPERS_H__ */ diff --git a/src/intel/genxml/genX_cl_pack.h b/src/intel/genxml/genX_cl_pack.h new file mode 100644 index 00000000000..c26877c1744 --- /dev/null +++ b/src/intel/genxml/genX_cl_pack.h @@ -0,0 +1,40 @@ +/* Copyright © 2023 Intel Corporation + * SPDX-License-Identifier: MIT + */ + +#ifndef GENX_CL_PACK_H +#define GENX_CL_PACK_H + +#ifndef GFX_VERx10 +# error "The GFX_VERx10 macro must be defined" +#endif + +#if (GFX_VERx10 == 40) +# include "genxml/gen4_cl_pack.h" +#elif (GFX_VERx10 == 45) +# include "genxml/gen45_cl_pack.h" +#elif (GFX_VERx10 == 50) +# include "genxml/gen5_cl_pack.h" +#elif (GFX_VERx10 == 60) +# include "genxml/gen6_cl_pack.h" +#elif (GFX_VERx10 == 70) +# include "genxml/gen7_cl_pack.h" +#elif (GFX_VERx10 == 75) +# include "genxml/gen75_cl_pack.h" +#elif (GFX_VERx10 == 80) +# include "genxml/gen8_cl_pack.h" +#elif (GFX_VERx10 == 90) +# include "genxml/gen9_cl_pack.h" +#elif (GFX_VERx10 == 110) +# include "genxml/gen11_cl_pack.h" +#elif (GFX_VERx10 == 120) +# include "genxml/gen12_cl_pack.h" +#elif (GFX_VERx10 == 125) +# include "genxml/gen125_cl_pack.h" +#elif (GFX_VERx10 == 200) +# include "genxml/gen20_cl_pack.h" +#else +# error "Need to add a pack header include for this gen" +#endif + +#endif /* GENX_CL_PACK_H */ diff --git a/src/intel/genxml/genX_helpers.h b/src/intel/genxml/genX_helpers.h new file mode 100644 index 00000000000..d94f622954e --- /dev/null +++ b/src/intel/genxml/genX_helpers.h @@ -0,0 +1,66 @@ +/* Copyright © 2023 Intel Corporation + * SPDX-License-Identifier: MIT + */ + +#ifndef __GENX_HELPERS_H__ +#define __GENX_HELPERS_H__ + +#ifndef __gen_validate_value +#define __gen_validate_value(x) +#endif + +#ifndef __intel_field_functions +#define __intel_field_functions +#endif + +#ifdef NDEBUG +#define NDEBUG_UNUSED __attribute__((unused)) +#else +#define NDEBUG_UNUSED +#endif + +#ifndef __gen_address_type +#error #define __gen_address_type before including this file +#endif + +#ifndef __gen_user_data +#error #define __gen_combine_address before including this file +#endif + +static inline __attribute__((always_inline)) uint64_t +__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) +{ + __gen_validate_value(v); +#ifndef NDEBUG + uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; + + assert((v & ~mask) == 0); +#endif + + return v; +} + +static inline __attribute__((always_inline)) uint64_t +__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end) +{ + assert(v != 0ull); + return __gen_offset(v, start, end); +} + +static inline __attribute__((always_inline)) uint64_t +__gen_address(__gen_user_data *data, void *location, + __gen_address_type address, uint32_t delta, + __attribute__((unused)) uint32_t start, uint32_t end) +{ + uint64_t addr_u64 = __gen_combine_address(data, location, address, delta); + if (end == 31) { + return addr_u64; + } else if (end < 63) { + const unsigned shift = 63 - end; + return (addr_u64 << shift) >> shift; + } else { + return addr_u64; + } +} + +#endif /* __GENX_HELPERS_H__ */ diff --git a/src/intel/genxml/gen_pack_header.py b/src/intel/genxml/gen_pack_header.py index e94661cb23f..05fee3ca1b1 100644 --- a/src/intel/genxml/gen_pack_header.py +++ b/src/intel/genxml/gen_pack_header.py @@ -45,87 +45,14 @@ pack_header = """%(license)s #ifndef __OPENCL_VERSION__ #include -#else -#define assert(cond) -#endif - #include "util/bitpack_helpers.h" - -#ifndef __gen_validate_value -#define __gen_validate_value(x) -#endif - -#ifndef __intel_field_functions -#define __intel_field_functions - -#ifdef NDEBUG -#define NDEBUG_UNUSED __attribute__((unused)) +#include "genX_helpers.h" #else -#define NDEBUG_UNUSED -#endif - -static inline __attribute__((always_inline)) uint64_t -__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) -{ - __gen_validate_value(v); -#ifndef NDEBUG - uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; - - assert((v & ~mask) == 0); -#endif - - return v; -} - -static inline __attribute__((always_inline)) uint64_t -__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end) -{ - assert(v != 0ull); - return __gen_offset(v, start, end); -} - -#ifndef __OPENCL_VERSION__ -static inline __attribute__((always_inline)) uint64_t -__gen_address(__gen_user_data *data, void *location, - __gen_address_type address, uint32_t delta, - __attribute__((unused)) uint32_t start, uint32_t end) -{ - uint64_t addr_u64 = __gen_combine_address(data, location, address, delta); - if (end == 31) { - return addr_u64; - } else if (end < 63) { - const unsigned shift = 63 - end; - return (addr_u64 << shift) >> shift; - } else { - return addr_u64; - } -} -#else -static inline __attribute__((always_inline)) uint64_t -__gen_address(__gen_address_type address, - __attribute__((unused)) uint32_t start, uint32_t end) -{ - if (end < 63) { - const unsigned shift = 63 - end; - return (address << shift) >> shift; - } else { - return address; - } -} -#endif - -#ifndef __gen_address_type -#error #define __gen_address_type before including this file -#endif - -#ifndef __gen_user_data -#error #define __gen_combine_address before including this file +#include "genX_cl_helpers.h" #endif #undef NDEBUG_UNUSED -#endif - """ def num_from_str(num_str): @@ -190,7 +117,7 @@ class Field(object): def emit_template_struct(self, dim): if self.type == 'address': - type = '__gen_address_type' + type = 'uint64_t' if self.parser.opencl else '__gen_address_type' elif self.type == 'bool': type = 'bool' elif self.type == 'float': @@ -290,7 +217,7 @@ class Group(object): dwords[index + 1] = dwords[index] index = index + 1 - def collect_dwords_and_length(self): + def collect_dwords_and_length(self, repack=False): dwords = {} self.collect_dwords(dwords, 0, "") @@ -307,7 +234,7 @@ class Group(object): return (dwords, length) - def emit_pack_function(self, dwords, length): + def emit_pack_function(self, dwords, length, repack=False): for index in range(length): # Handle MBZ dwords if not index in dwords: @@ -331,8 +258,20 @@ class Group(object): name = field.name + field.dim if field.is_struct_type() and field.start % 32 == 0: print("") - print(" %s_pack(data, &dw[%d], &values->%s);" % - (self.parser.gen_prefix(safe_name(field.type)), index, name)) + if repack: + if self.parser.opencl: + print(" %s_repack(&dw[%d], &origin[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, index, name)) + else: + print(" %s_pack(data, &dw[%d], &origin[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, index, name)) + else: + if self.parser.opencl: + print(" %s_pack(&dw[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, name)) + else: + print(" %s_pack(data, &dw[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, name)) continue # Pack any fields of struct type first so we have integer values @@ -343,8 +282,20 @@ class Group(object): name = field.name + field.dim print("") print(" uint32_t v%d_%d;" % (index, field_index)) - print(" %s_pack(data, &v%d_%d, &values->%s);" % - (self.parser.gen_prefix(safe_name(field.type)), index, field_index, name)) + if repack: + if self.parser.opencl: + print(" %s_repack(&v%d_%d, &origin[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, field_index, index, name)) + else: + print(" %s_repack(data, &v%d_%d, &origin[%d], &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, field_index, index, name)) + else: + if self.parser.opencl: + print(" %s_pack(&v%d_%d, &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, field_index, name)) + else: + print(" %s_pack(data, &v%d_%d, &values->%s);" % + (self.parser.gen_prefix(safe_name(field.type)), index, field_index, name)) field_index = field_index + 1 print("") @@ -364,7 +315,7 @@ class Group(object): if dw.size == 32 and dw.address == None: v = None print(" dw[%d] =" % index) - elif len(dw.fields) > address_count: + elif len(dw.fields) > address_count or repack: v = "v%d" % index print(" const uint%d_t %s =" % (dw.size, v)) else: @@ -372,13 +323,21 @@ class Group(object): field_index = 0 non_address_fields = [] + + if repack: + non_address_fields.append("origin[%d]" % index) + if dw.size > 32: + non_address_fields.append("((uint64_t)origin[%d] << 32)" % (index + 1)) + for field in dw.fields: - if field.type != "mbo" and field.type != "mbz": + if field.type != "mbo" and field.type != "mbz" and field.type != "repack": name = field.name + field.dim nz = "_nonzero" if field.nonzero else "" - if field.type == "mbo": + if field.type == "repack": + non_address_fields.append("origin[%d]" % index) + elif field.type == "mbo": non_address_fields.append("util_bitpack_ones(%d, %d)" % \ (field.start - dword_start, field.end - dword_start)) elif field.type == "mbz": @@ -422,9 +381,9 @@ class Group(object): if dw.size == 32: if dw.address: if self.parser.opencl: - print(" dw[%d] = __gen_address(values->%s, %d, %d);" % + print(" dw[%d] = __gen_address(values->%s, %d, %d) | %s;" % (index, dw.address.name + field.dim, - dw.address.start - dword_start, dw.address.end - dword_start)) + dw.address.start - dword_start, dw.address.end - dword_start, v)) else: print(" dw[%d] = __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" % (index, index, dw.address.name + field.dim, v, @@ -434,9 +393,9 @@ class Group(object): if dw.address: v_address = "v%d_address" % index if self.parser.opencl: - print(" const uint64_t %s =\n __gen_address(values->%s, %d, %d);" % + print(" const uint64_t %s =\n __gen_address(values->%s, %d, %d) | %s;" % (v_address, dw.address.name + field.dim, - dw.address.start - dword_start, dw.address.end - dword_start)) + dw.address.start - dword_start, dw.address.end - dword_start, v)) else: print(" const uint64_t %s =\n __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" % (v_address, index, dw.address.name + field.dim, v, @@ -457,13 +416,14 @@ class Value(object): self.dont_use = int(attrs["dont_use"]) != 0 if "dont_use" in attrs else False class Parser(object): - def __init__(self, opencl): + def __init__(self, opencl, repack): self.instruction = None self.structs = {} # Set of enum names we've seen. self.enums = set() self.registers = {} self.opencl = opencl + self.repack = repack def gen_prefix(self, name): if name[0] == "_": @@ -555,28 +515,46 @@ class Parser(object): group.emit_template_struct("") print("};\n") - def emit_pack_function(self, name, group): + def emit_pack_function(self, name, group, repack=False): name = self.gen_prefix(name) - if self.opencl: - print(textwrap.dedent("""\ - static inline __attribute__((always_inline)) void - %s_pack(__attribute__((unused)) global void * restrict dst, - %s__attribute__((unused)) const struct %s * restrict values) - {""") % (name, ' ' * len(name), name)) + if repack: + if self.opencl: + print(textwrap.dedent("""\ + static inline __attribute__((always_inline)) void + %s_repack(__attribute__((unused)) global void * restrict dst, + %s__attribute__((unused)) global const uint32_t * origin, + %s__attribute__((unused)) const struct %s * restrict values) + {""") % (name, ' ' * len(name), ' ' * len(name), name)) + else: + print(textwrap.dedent("""\ + static inline __attribute__((always_inline)) void + %s_repack(__attribute__((unused)) __gen_user_data *data, + %s__attribute__((unused)) void * restrict dst, + %s__attribute__((unused)) global const uint32_t * origin, + %s__attribute__((unused)) const struct %s * restrict values) + {""") % (name, ' ' * len(name), ' ' * len(name), ' ' * len(name), name)) else: - print(textwrap.dedent("""\ - static inline __attribute__((always_inline)) void - %s_pack(__attribute__((unused)) __gen_user_data *data, - %s__attribute__((unused)) void * restrict dst, - %s__attribute__((unused)) const struct %s * restrict values) - {""") % (name, ' ' * len(name), ' ' * len(name), name)) + if self.opencl: + print(textwrap.dedent("""\ + static inline __attribute__((always_inline)) void + %s_pack(__attribute__((unused)) global void * restrict dst, + %s__attribute__((unused)) const struct %s * restrict values) + {""") % (name, ' ' * len(name), name)) + else: + print(textwrap.dedent("""\ + static inline __attribute__((always_inline)) void + %s_pack(__attribute__((unused)) __gen_user_data *data, + %s__attribute__((unused)) void * restrict dst, + %s__attribute__((unused)) const struct %s * restrict values) + {""") % (name, ' ' * len(name), ' ' * len(name), name)) - (dwords, length) = group.collect_dwords_and_length() + (dwords, length) = group.collect_dwords_and_length(repack) if length: # Cast dst to make header C++ friendly - print(" uint32_t * restrict dw = (uint32_t * restrict) dst;") + type_name = "global uint32_t *" if self.opencl else "uint32_t * restrict" + print(" %s dw = (%s) dst;" % (type_name, type_name)) - group.emit_pack_function(dwords, length) + group.emit_pack_function(dwords, length, repack) print("}\n") @@ -609,8 +587,9 @@ class Parser(object): print('') self.emit_template_struct(self.instruction, self.group) - self.emit_pack_function(self.instruction, self.group) + if self.repack: + self.emit_pack_function(self.instruction, self.group, repack=True) def emit_register(self): name = self.register @@ -633,6 +612,8 @@ class Parser(object): self.emit_template_struct(self.struct, self.group) self.emit_pack_function(self.struct, self.group) + if self.repack: + self.emit_pack_function(self.struct, self.group, repack=True) def emit_enum(self): print('enum %s {' % self.gen_prefix(self.enum)) @@ -662,6 +643,7 @@ def parse_args(): p.add_argument('--include-symbols', nargs='?', type=str, action='store', help="List of instruction/structures to generate") p.add_argument('--opencl', action='store_true', help="Generate OpenCL code") + p.add_argument('--repack', action='store_true', help="Emit repacking code") pargs = p.parse_args() @@ -688,7 +670,7 @@ def main(): genxml.filter_engines(engines) if pargs.include_symbols: genxml.filter_symbols(pargs.include_symbols.split(',')) - p = Parser(pargs.opencl) + p = Parser(pargs.opencl, pargs.repack) p.emit_genxml(genxml) if __name__ == '__main__': diff --git a/src/intel/genxml/meson.build b/src/intel/genxml/meson.build index d8fa45a3b4f..bb4dd4cf42e 100644 --- a/src/intel/genxml/meson.build +++ b/src/intel/genxml/meson.build @@ -117,9 +117,43 @@ foreach f : gen_xml_files + gen_xml_rt_files ) endforeach +genX_cl_included_symbols = [ + # instructions + 'MI_BATCH_BUFFER_START', + '3DSTATE_CONSTANT_ALL', + '3DSTATE_CONSTANT_VS', + '3DSTATE_RASTER', + '3DSTATE_INDEX_BUFFER', + '3DSTATE_VERTEX_BUFFERS', + '3DPRIMITIVE', + '3DPRIMITIVE_EXTENDED', + # structures + '3DSTATE_CONSTANT_BODY', + 'VERTEX_BUFFER_STATE', +] + +gen_cl_xml_pack = [] +foreach f : gen_xml_files + gen_xml_rt_files + _name = '@0@_cl_pack.h'.format(f.split('.')[0]) + gen_cl_xml_pack += custom_target( + _name, + input : ['gen_pack_header.py', f], + output : _name, + command : [prog_python, '@INPUT@', '--engines=render,blitter,video', + '--opencl', '--repack', + '--include-symbols', ','.join(genX_cl_included_symbols)], + capture : true, + depend_files: gen_pack_header_deps + ) +endforeach + gen_pack_header_py = files('gen_pack_header.py') -idep_genxml = declare_dependency(sources : [gen_xml_pack, genX_bits_h, genX_xml_h]) +idep_genxml = declare_dependency( + include_directories : include_directories('.'), + dependencies : idep_mesautil, + sources : [gen_xml_pack, gen_cl_xml_pack, genX_bits_h, genX_xml_h] +) foreach f : gen_xml_files + gen_xml_rt_files test( diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build index b5a4bc50f6e..a90c6d505a6 100644 --- a/src/intel/isl/meson.build +++ b/src/intel/isl/meson.build @@ -68,7 +68,7 @@ foreach g : [['40', isl_gfx4_files], ['50', []], ['60', isl_gfx6_files], _gfx_ver = g[0] isl_per_hw_ver_libs += static_library( 'isl_per_hw_ver@0@'.format(_gfx_ver), - [g[1], isl_per_hw_ver_files, gen_xml_pack], + [g[1], isl_per_hw_ver_files], include_directories : [inc_include, inc_src, inc_intel], dependencies : [idep_mesautil, idep_intel_dev, idep_genxml], c_args : [ diff --git a/src/intel/vulkan/grl/meson.build b/src/intel/vulkan/grl/meson.build index 1bf4c3b4e9f..c4461ff18f4 100644 --- a/src/intel/vulkan/grl/meson.build +++ b/src/intel/vulkan/grl/meson.build @@ -176,7 +176,7 @@ foreach t : [['125', 'gfx125', 'dg2']] ], dependencies : [ dep_valgrind, idep_nir_headers, idep_vulkan_util_headers, idep_vulkan_wsi_headers, - idep_vulkan_runtime_headers, idep_anv_headers, + idep_vulkan_runtime_headers, idep_anv_headers, idep_genxml, ], gnu_symbol_visibility : 'hidden', )