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radv: emit the GLC bit for SSBO loads/stores when needed

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This fixes some new memory model tests:
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.*

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108112
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2018-10-03 23:06:34 +02:00
parent 4b74f05f6b
commit 416013b4f5
3 changed files with 22 additions and 8 deletions
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3
src/amd/common/ac_llvm_build.h
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@@ -274,7 +274,8 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
LLVMValueRef vindex,
LLVMValueRef voffset,
LLVMValueRef soffset,
LLVMValueRef immoffset);
LLVMValueRef immoffset,
LLVMValueRef glc);
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx);