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intel/compiler: No need to re-type the destination register

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For 16-bit float case handling, intermediate destination register is
already 32-bit wide, we don't have to retype it to 32-bit.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29506>
This commit is contained in:
Sagar Ghuge
2024-05-31 10:12:35 -07:00
committed by Marge Bot
parent 1e0a0b4dd5
commit 415c5ad989
1 changed files with 1 additions and 2 deletions
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3
src/intel/compiler/brw_fs_nir.cpp
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@@ -7713,8 +7713,7 @@ fs_nir_emit_surface_atomic(nir_to_brw_state &ntb, const fs_builder &bld,
bld.emit(SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL,
retype(dest32, dest.type),
srcs, SURFACE_LOGICAL_NUM_SRCS);
bld.MOV(retype(dest, BRW_TYPE_UW),
retype(dest32, BRW_TYPE_UD));
bld.MOV(retype(dest, BRW_TYPE_UW), dest32);
break;
}