R600: initial copy of r300 code
This commit is contained in:
719
src/mesa/drivers/dri/r600/r700_fragprog.c
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719
src/mesa/drivers/dri/r600/r700_fragprog.c
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@@ -0,0 +1,719 @@
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/*
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* Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
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*
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "r700_fragprog.h"
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#include "radeon_nqssadce.h"
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#include "radeon_program_alu.h"
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static void reset_srcreg(struct prog_src_register* reg)
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{
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_mesa_bzero(reg, sizeof(*reg));
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reg->Swizzle = SWIZZLE_NOOP;
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}
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static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
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{
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gl_state_index fail_value_tokens[STATE_LENGTH] = {
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STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
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};
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struct prog_src_register reg = { 0, };
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fail_value_tokens[2] = tmu;
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reg.File = PROGRAM_STATE_VAR;
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reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
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reg.Swizzle = SWIZZLE_WWWW;
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return reg;
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}
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/**
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* Transform TEX, TXP, TXB, and KIL instructions in the following way:
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* - premultiply texture coordinates for RECT
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* - extract operand swizzles
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* - introduce a temporary register when write masks are needed
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*
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*/
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static GLboolean transform_TEX(
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struct radeon_transform_context *t,
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struct prog_instruction* orig_inst, void* data)
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{
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struct r500_fragment_program_compiler *compiler =
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(struct r500_fragment_program_compiler*)data;
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struct prog_instruction inst = *orig_inst;
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struct prog_instruction* tgt;
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GLboolean destredirect = GL_FALSE;
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if (inst.Opcode != OPCODE_TEX &&
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inst.Opcode != OPCODE_TXB &&
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inst.Opcode != OPCODE_TXP &&
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inst.Opcode != OPCODE_KIL)
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return GL_FALSE;
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/* ARB_shadow & EXT_shadow_funcs */
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if (inst.Opcode != OPCODE_KIL &&
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t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
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GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
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if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
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tgt = radeonAppendInstructions(t->Program, 1);
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tgt->Opcode = OPCODE_MOV;
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tgt->DstReg = inst.DstReg;
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if (comparefunc == GL_ALWAYS) {
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tgt->SrcReg[0].File = PROGRAM_BUILTIN;
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tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
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} else {
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tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
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}
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return GL_TRUE;
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}
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inst.DstReg.File = PROGRAM_TEMPORARY;
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inst.DstReg.Index = radeonFindFreeTemporary(t);
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inst.DstReg.WriteMask = WRITEMASK_XYZW;
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} else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) {
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int tempreg = radeonFindFreeTemporary(t);
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inst.DstReg.File = PROGRAM_TEMPORARY;
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inst.DstReg.Index = tempreg;
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inst.DstReg.WriteMask = WRITEMASK_XYZW;
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destredirect = GL_TRUE;
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}
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if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) {
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int tmpreg = radeonFindFreeTemporary(t);
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tgt = radeonAppendInstructions(t->Program, 1);
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tgt->Opcode = OPCODE_MOV;
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tgt->DstReg.File = PROGRAM_TEMPORARY;
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tgt->DstReg.Index = tmpreg;
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tgt->SrcReg[0] = inst.SrcReg[0];
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reset_srcreg(&inst.SrcReg[0]);
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inst.SrcReg[0].File = PROGRAM_TEMPORARY;
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inst.SrcReg[0].Index = tmpreg;
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}
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tgt = radeonAppendInstructions(t->Program, 1);
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_mesa_copy_instructions(tgt, &inst, 1);
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if (inst.Opcode != OPCODE_KIL &&
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t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
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GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
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GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
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int rcptemp = radeonFindFreeTemporary(t);
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int pass, fail;
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tgt = radeonAppendInstructions(t->Program, 3);
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tgt[0].Opcode = OPCODE_RCP;
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tgt[0].DstReg.File = PROGRAM_TEMPORARY;
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tgt[0].DstReg.Index = rcptemp;
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tgt[0].DstReg.WriteMask = WRITEMASK_W;
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tgt[0].SrcReg[0] = inst.SrcReg[0];
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tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
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tgt[1].Opcode = OPCODE_MAD;
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tgt[1].DstReg = inst.DstReg;
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tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
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tgt[1].SrcReg[0] = inst.SrcReg[0];
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tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
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tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
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tgt[1].SrcReg[1].Index = rcptemp;
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tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
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tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
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tgt[1].SrcReg[2].Index = inst.DstReg.Index;
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if (depthmode == 0) /* GL_LUMINANCE */
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tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
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else if (depthmode == 2) /* GL_ALPHA */
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tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
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/* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
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* r < tex <=> -tex+r < 0
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* r >= tex <=> not (-tex+r < 0 */
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if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
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tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
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else
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tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
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tgt[2].Opcode = OPCODE_CMP;
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tgt[2].DstReg = orig_inst->DstReg;
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tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
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tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
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if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
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pass = 1;
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fail = 2;
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} else {
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pass = 2;
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fail = 1;
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}
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tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
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tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
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tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
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} else if (destredirect) {
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tgt = radeonAppendInstructions(t->Program, 1);
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tgt->Opcode = OPCODE_MOV;
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tgt->DstReg = orig_inst->DstReg;
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tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
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tgt->SrcReg[0].Index = inst.DstReg.Index;
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}
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return GL_TRUE;
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}
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static void update_params(r300ContextPtr r300, struct r500_fragment_program *fp)
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{
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struct gl_fragment_program *mp = &fp->mesa_program;
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/* Ask Mesa nicely to fill in ParameterValues for us */
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if (mp->Base.Parameters)
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_mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
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}
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/**
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* Transform the program to support fragment.position.
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*
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* Introduce a small fragment at the start of the program that will be
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* the only code that directly reads the FRAG_ATTRIB_WPOS input.
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* All other code pieces that reference that input will be rewritten
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* to read from a newly allocated temporary.
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*
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* \todo if/when r5xx supports the radeon_program architecture, this is a
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* likely candidate for code sharing.
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*/
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static void insert_WPOS_trailer(struct r500_fragment_program_compiler *compiler)
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{
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GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
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if (!(InputsRead & FRAG_BIT_WPOS))
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return;
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static gl_state_index tokens[STATE_LENGTH] = {
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STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
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};
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struct prog_instruction *fpi;
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GLuint window_index;
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int i = 0;
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GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
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_mesa_insert_instructions(compiler->program, 0, 3);
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fpi = compiler->program->Instructions;
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/* perspective divide */
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fpi[i].Opcode = OPCODE_RCP;
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fpi[i].DstReg.File = PROGRAM_TEMPORARY;
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fpi[i].DstReg.Index = tempregi;
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fpi[i].DstReg.WriteMask = WRITEMASK_W;
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fpi[i].DstReg.CondMask = COND_TR;
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fpi[i].SrcReg[0].File = PROGRAM_INPUT;
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fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
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fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
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i++;
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fpi[i].Opcode = OPCODE_MUL;
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fpi[i].DstReg.File = PROGRAM_TEMPORARY;
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fpi[i].DstReg.Index = tempregi;
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fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
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fpi[i].DstReg.CondMask = COND_TR;
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fpi[i].SrcReg[0].File = PROGRAM_INPUT;
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fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
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fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
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fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
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fpi[i].SrcReg[1].Index = tempregi;
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fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
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i++;
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/* viewport transformation */
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window_index = _mesa_add_state_reference(compiler->program->Parameters, tokens);
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fpi[i].Opcode = OPCODE_MAD;
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fpi[i].DstReg.File = PROGRAM_TEMPORARY;
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fpi[i].DstReg.Index = tempregi;
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fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
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fpi[i].DstReg.CondMask = COND_TR;
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fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
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fpi[i].SrcReg[0].Index = tempregi;
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fpi[i].SrcReg[0].Swizzle =
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MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
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fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
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fpi[i].SrcReg[1].Index = window_index;
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fpi[i].SrcReg[1].Swizzle =
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MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
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fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
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fpi[i].SrcReg[2].Index = window_index;
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fpi[i].SrcReg[2].Swizzle =
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MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
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i++;
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for (; i < compiler->program->NumInstructions; ++i) {
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int reg;
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for (reg = 0; reg < 3; reg++) {
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if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
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fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
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fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
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fpi[i].SrcReg[reg].Index = tempregi;
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}
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}
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}
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}
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static void nqssadce_init(struct nqssadce_state* s)
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{
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s->Outputs[FRAG_RESULT_COLOR].Sourced = WRITEMASK_XYZW;
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s->Outputs[FRAG_RESULT_DEPTH].Sourced = WRITEMASK_W;
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}
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static GLboolean is_native_swizzle(GLuint opcode, struct prog_src_register reg)
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{
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GLuint relevant;
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int i;
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if (opcode == OPCODE_TEX ||
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opcode == OPCODE_TXB ||
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opcode == OPCODE_TXP ||
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opcode == OPCODE_KIL) {
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if (reg.Abs)
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return GL_FALSE;
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if (reg.NegateAbs)
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reg.NegateBase ^= 15;
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if (opcode == OPCODE_KIL) {
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if (reg.Swizzle != SWIZZLE_NOOP)
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return GL_FALSE;
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} else {
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for(i = 0; i < 4; ++i) {
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GLuint swz = GET_SWZ(reg.Swizzle, i);
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if (swz == SWIZZLE_NIL) {
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reg.NegateBase &= ~(1 << i);
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continue;
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}
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if (swz >= 4)
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return GL_FALSE;
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}
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}
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if (reg.NegateBase)
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return GL_FALSE;
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return GL_TRUE;
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} else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
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/* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
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* if it doesn't fit perfectly into a .xyzw case... */
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if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs
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&& !reg.NegateBase && !reg.NegateAbs)
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return GL_TRUE;
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return GL_FALSE;
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} else {
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/* ALU instructions support almost everything */
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if (reg.Abs)
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return GL_TRUE;
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relevant = 0;
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for(i = 0; i < 3; ++i) {
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GLuint swz = GET_SWZ(reg.Swizzle, i);
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if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
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relevant |= 1 << i;
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}
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if ((reg.NegateBase & relevant) && ((reg.NegateBase & relevant) != relevant))
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return GL_FALSE;
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return GL_TRUE;
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}
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}
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/**
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* Implement a MOV with a potentially non-native swizzle.
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*
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* The only thing we *cannot* do in an ALU instruction is per-component
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* negation. Therefore, we split the MOV into two instructions when necessary.
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*/
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static void nqssadce_build_swizzle(struct nqssadce_state *s,
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struct prog_dst_register dst, struct prog_src_register src)
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{
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struct prog_instruction *inst;
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GLuint negatebase[2] = { 0, 0 };
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int i;
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for(i = 0; i < 4; ++i) {
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GLuint swz = GET_SWZ(src.Swizzle, i);
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if (swz == SWIZZLE_NIL)
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continue;
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negatebase[GET_BIT(src.NegateBase, i)] |= 1 << i;
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}
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_mesa_insert_instructions(s->Program, s->IP, (negatebase[0] ? 1 : 0) + (negatebase[1] ? 1 : 0));
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inst = s->Program->Instructions + s->IP;
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for(i = 0; i <= 1; ++i) {
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if (!negatebase[i])
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continue;
|
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inst->Opcode = OPCODE_MOV;
|
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inst->DstReg = dst;
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inst->DstReg.WriteMask = negatebase[i];
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inst->SrcReg[0] = src;
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inst++;
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s->IP++;
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}
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||||
}
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||||
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||||
static GLuint build_dtm(GLuint depthmode)
|
||||
{
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switch(depthmode) {
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||||
default:
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||||
case GL_LUMINANCE: return 0;
|
||||
case GL_INTENSITY: return 1;
|
||||
case GL_ALPHA: return 2;
|
||||
}
|
||||
}
|
||||
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||||
static GLuint build_func(GLuint comparefunc)
|
||||
{
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||||
return comparefunc - GL_NEVER;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Collect all external state that is relevant for compiling the given
|
||||
* fragment program.
|
||||
*/
|
||||
static void build_state(
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||||
r300ContextPtr r300,
|
||||
struct r500_fragment_program *fp,
|
||||
struct r500_fragment_program_external_state *state)
|
||||
{
|
||||
int unit;
|
||||
|
||||
_mesa_bzero(state, sizeof(*state));
|
||||
|
||||
for(unit = 0; unit < 16; ++unit) {
|
||||
if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
|
||||
struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
|
||||
|
||||
state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
|
||||
state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void dump_program(struct r500_fragment_program_code *code);
|
||||
|
||||
void r500TranslateFragmentShader(r300ContextPtr r300,
|
||||
struct r500_fragment_program *fp)
|
||||
{
|
||||
struct r500_fragment_program_external_state state;
|
||||
|
||||
build_state(r300, fp, &state);
|
||||
if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
|
||||
/* TODO: cache compiled programs */
|
||||
fp->translated = GL_FALSE;
|
||||
_mesa_memcpy(&fp->state, &state, sizeof(state));
|
||||
}
|
||||
|
||||
if (!fp->translated) {
|
||||
struct r500_fragment_program_compiler compiler;
|
||||
|
||||
compiler.r300 = r300;
|
||||
compiler.fp = fp;
|
||||
compiler.code = &fp->code;
|
||||
compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
|
||||
|
||||
if (RADEON_DEBUG & DEBUG_PIXEL) {
|
||||
_mesa_printf("Compiler: Initial program:\n");
|
||||
_mesa_print_program(compiler.program);
|
||||
}
|
||||
|
||||
insert_WPOS_trailer(&compiler);
|
||||
|
||||
struct radeon_program_transformation transformations[] = {
|
||||
{ &transform_TEX, &compiler },
|
||||
{ &radeonTransformALU, 0 },
|
||||
{ &radeonTransformDeriv, 0 },
|
||||
{ &radeonTransformTrigScale, 0 }
|
||||
};
|
||||
radeonLocalTransform(r300->radeon.glCtx, compiler.program,
|
||||
4, transformations);
|
||||
|
||||
if (RADEON_DEBUG & DEBUG_PIXEL) {
|
||||
_mesa_printf("Compiler: after native rewrite:\n");
|
||||
_mesa_print_program(compiler.program);
|
||||
}
|
||||
|
||||
struct radeon_nqssadce_descr nqssadce = {
|
||||
.Init = &nqssadce_init,
|
||||
.IsNativeSwizzle = &is_native_swizzle,
|
||||
.BuildSwizzle = &nqssadce_build_swizzle,
|
||||
.RewriteDepthOut = GL_TRUE
|
||||
};
|
||||
radeonNqssaDce(r300->radeon.glCtx, compiler.program, &nqssadce);
|
||||
|
||||
if (RADEON_DEBUG & DEBUG_PIXEL) {
|
||||
_mesa_printf("Compiler: after NqSSA-DCE:\n");
|
||||
_mesa_print_program(compiler.program);
|
||||
}
|
||||
|
||||
fp->translated = r500FragmentProgramEmit(&compiler);
|
||||
|
||||
/* Subtle: Rescue any parameters that have been added during transformations */
|
||||
_mesa_free_parameter_list(fp->mesa_program.Base.Parameters);
|
||||
fp->mesa_program.Base.Parameters = compiler.program->Parameters;
|
||||
compiler.program->Parameters = 0;
|
||||
|
||||
_mesa_reference_program(r300->radeon.glCtx, &compiler.program, 0);
|
||||
|
||||
r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
|
||||
|
||||
if (RADEON_DEBUG & DEBUG_PIXEL) {
|
||||
if (fp->translated) {
|
||||
_mesa_printf("Machine-readable code:\n");
|
||||
dump_program(&fp->code);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
update_params(r300, fp);
|
||||
|
||||
}
|
||||
|
||||
static char *toswiz(int swiz_val) {
|
||||
switch(swiz_val) {
|
||||
case 0: return "R";
|
||||
case 1: return "G";
|
||||
case 2: return "B";
|
||||
case 3: return "A";
|
||||
case 4: return "0";
|
||||
case 5: return "1/2";
|
||||
case 6: return "1";
|
||||
case 7: return "U";
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static char *toop(int op_val)
|
||||
{
|
||||
char *str = NULL;
|
||||
switch (op_val) {
|
||||
case 0: str = "MAD"; break;
|
||||
case 1: str = "DP3"; break;
|
||||
case 2: str = "DP4"; break;
|
||||
case 3: str = "D2A"; break;
|
||||
case 4: str = "MIN"; break;
|
||||
case 5: str = "MAX"; break;
|
||||
case 6: str = "Reserved"; break;
|
||||
case 7: str = "CND"; break;
|
||||
case 8: str = "CMP"; break;
|
||||
case 9: str = "FRC"; break;
|
||||
case 10: str = "SOP"; break;
|
||||
case 11: str = "MDH"; break;
|
||||
case 12: str = "MDV"; break;
|
||||
}
|
||||
return str;
|
||||
}
|
||||
|
||||
static char *to_alpha_op(int op_val)
|
||||
{
|
||||
char *str = NULL;
|
||||
switch (op_val) {
|
||||
case 0: str = "MAD"; break;
|
||||
case 1: str = "DP"; break;
|
||||
case 2: str = "MIN"; break;
|
||||
case 3: str = "MAX"; break;
|
||||
case 4: str = "Reserved"; break;
|
||||
case 5: str = "CND"; break;
|
||||
case 6: str = "CMP"; break;
|
||||
case 7: str = "FRC"; break;
|
||||
case 8: str = "EX2"; break;
|
||||
case 9: str = "LN2"; break;
|
||||
case 10: str = "RCP"; break;
|
||||
case 11: str = "RSQ"; break;
|
||||
case 12: str = "SIN"; break;
|
||||
case 13: str = "COS"; break;
|
||||
case 14: str = "MDH"; break;
|
||||
case 15: str = "MDV"; break;
|
||||
}
|
||||
return str;
|
||||
}
|
||||
|
||||
static char *to_mask(int val)
|
||||
{
|
||||
char *str = NULL;
|
||||
switch(val) {
|
||||
case 0: str = "NONE"; break;
|
||||
case 1: str = "R"; break;
|
||||
case 2: str = "G"; break;
|
||||
case 3: str = "RG"; break;
|
||||
case 4: str = "B"; break;
|
||||
case 5: str = "RB"; break;
|
||||
case 6: str = "GB"; break;
|
||||
case 7: str = "RGB"; break;
|
||||
case 8: str = "A"; break;
|
||||
case 9: str = "AR"; break;
|
||||
case 10: str = "AG"; break;
|
||||
case 11: str = "ARG"; break;
|
||||
case 12: str = "AB"; break;
|
||||
case 13: str = "ARB"; break;
|
||||
case 14: str = "AGB"; break;
|
||||
case 15: str = "ARGB"; break;
|
||||
}
|
||||
return str;
|
||||
}
|
||||
|
||||
static char *to_texop(int val)
|
||||
{
|
||||
switch(val) {
|
||||
case 0: return "NOP";
|
||||
case 1: return "LD";
|
||||
case 2: return "TEXKILL";
|
||||
case 3: return "PROJ";
|
||||
case 4: return "LODBIAS";
|
||||
case 5: return "LOD";
|
||||
case 6: return "DXDY";
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void dump_program(struct r500_fragment_program_code *code)
|
||||
{
|
||||
|
||||
fprintf(stderr, "R500 Fragment Program:\n--------\n");
|
||||
|
||||
int n;
|
||||
uint32_t inst;
|
||||
uint32_t inst0;
|
||||
char *str = NULL;
|
||||
|
||||
if (code->const_nr) {
|
||||
fprintf(stderr, "--------\nConstants:\n");
|
||||
for (n = 0; n < code->const_nr; n++) {
|
||||
fprintf(stderr, "Constant %d: %i[%i]\n", n,
|
||||
code->constant[n].File, code->constant[n].Index);
|
||||
}
|
||||
fprintf(stderr, "--------\n");
|
||||
}
|
||||
|
||||
for (n = 0; n < code->inst_end+1; n++) {
|
||||
inst0 = inst = code->inst[n].inst0;
|
||||
fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
|
||||
switch(inst & 0x3) {
|
||||
case R500_INST_TYPE_ALU: str = "ALU"; break;
|
||||
case R500_INST_TYPE_OUT: str = "OUT"; break;
|
||||
case R500_INST_TYPE_FC: str = "FC"; break;
|
||||
case R500_INST_TYPE_TEX: str = "TEX"; break;
|
||||
};
|
||||
fprintf(stderr,"%s %s %s %s %s ", str,
|
||||
inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
|
||||
inst & R500_INST_LAST ? "LAST" : "",
|
||||
inst & R500_INST_NOP ? "NOP" : "",
|
||||
inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
|
||||
fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
|
||||
to_mask((inst >> 15) & 0xf));
|
||||
|
||||
switch(inst0 & 0x3) {
|
||||
case 0:
|
||||
case 1:
|
||||
fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1);
|
||||
inst = code->inst[n].inst1;
|
||||
|
||||
fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
|
||||
inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
|
||||
(inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
|
||||
(inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
|
||||
(inst >> 30));
|
||||
|
||||
fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
|
||||
inst = code->inst[n].inst2;
|
||||
fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
|
||||
inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
|
||||
(inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
|
||||
(inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
|
||||
(inst >> 30));
|
||||
fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3);
|
||||
inst = code->inst[n].inst3;
|
||||
fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
|
||||
(inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
|
||||
(inst >> 11) & 0x3,
|
||||
(inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
|
||||
(inst >> 24) & 0x3);
|
||||
|
||||
|
||||
fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
|
||||
inst = code->inst[n].inst4;
|
||||
fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
|
||||
(inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
|
||||
(inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
|
||||
(inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
|
||||
(inst >> 31) & 0x1);
|
||||
|
||||
fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
|
||||
inst = code->inst[n].inst5;
|
||||
fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
|
||||
(inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
|
||||
(inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
|
||||
(inst >> 23) & 0x3,
|
||||
(inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
|
||||
break;
|
||||
case 2:
|
||||
break;
|
||||
case 3:
|
||||
inst = code->inst[n].inst1;
|
||||
fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
|
||||
to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
|
||||
(inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
|
||||
inst = code->inst[n].inst2;
|
||||
fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
|
||||
inst & 127, inst & (1<<7) ? "(rel)" : "",
|
||||
toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
|
||||
toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
|
||||
(inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
|
||||
toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
|
||||
toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
|
||||
|
||||
fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
|
||||
break;
|
||||
}
|
||||
fprintf(stderr,"\n");
|
||||
}
|
||||
|
||||
}
|
Reference in New Issue
Block a user