From 400645a5656315d3e48a0bb1c4e9cef12cd7ece2 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Mon, 26 Jun 2023 14:18:20 +0200 Subject: [PATCH] nir: Use nir_ instead of nir_build_ helpers Reviewed-by: Alyssa Rosenzweig Part-of: --- src/compiler/nir/nir_lower_mem_access_bit_sizes.c | 12 ++++++------ src/compiler/nir/nir_lower_point_smooth.c | 2 +- src/compiler/nir/nir_lower_tex.c | 2 +- src/compiler/nir/nir_split_64bit_vec3_and_vec4.c | 3 +-- 4 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/compiler/nir/nir_lower_mem_access_bit_sizes.c b/src/compiler/nir/nir_lower_mem_access_bit_sizes.c index e3e8a308fb8..3e6d7280efc 100644 --- a/src/compiler/nir/nir_lower_mem_access_bit_sizes.c +++ b/src/compiler/nir/nir_lower_mem_access_bit_sizes.c @@ -347,24 +347,24 @@ lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin, switch (intrin->intrinsic) { case nir_intrinsic_store_ssbo: - nir_build_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, iand_mask, + nir_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, iand_mask, .atomic_op = nir_atomic_op_iand, .access = nir_intrinsic_access(intrin)); - nir_build_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, data, + nir_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, data, .atomic_op = nir_atomic_op_ior, .access = nir_intrinsic_access(intrin)); break; case nir_intrinsic_store_global: - nir_build_global_atomic(b, 32, chunk_offset, iand_mask, + nir_global_atomic(b, 32, chunk_offset, iand_mask, .atomic_op = nir_atomic_op_iand); - nir_build_global_atomic(b, 32, chunk_offset, data, + nir_global_atomic(b, 32, chunk_offset, data, .atomic_op = nir_atomic_op_ior); break; case nir_intrinsic_store_shared: - nir_build_shared_atomic(b, 32, chunk_offset, iand_mask, + nir_shared_atomic(b, 32, chunk_offset, iand_mask, .atomic_op = nir_atomic_op_iand, .base = nir_intrinsic_base(intrin)); - nir_build_shared_atomic(b, 32, chunk_offset, data, + nir_shared_atomic(b, 32, chunk_offset, data, .atomic_op = nir_atomic_op_ior, .base = nir_intrinsic_base(intrin)); break; diff --git a/src/compiler/nir/nir_lower_point_smooth.c b/src/compiler/nir/nir_lower_point_smooth.c index bc7e13a1ec8..6f1f993657a 100644 --- a/src/compiler/nir/nir_lower_point_smooth.c +++ b/src/compiler/nir/nir_lower_point_smooth.c @@ -64,7 +64,7 @@ lower_point_smooth(nir_builder *b, nir_instr *instr, UNUSED void *_state) b->cursor = nir_before_instr(&intr->instr); - nir_ssa_def *coord = nir_build_load_point_coord_maybe_flipped(b); + nir_ssa_def *coord = nir_load_point_coord_maybe_flipped(b); /* point_size = 1.0 / dFdx(gl_PointCoord.x); */ nir_ssa_def *point_size = nir_frcp(b, nir_fddx(b, nir_channel(b, coord, 0))); diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index b01f18a8f32..7b09e749cf6 100644 --- a/src/compiler/nir/nir_lower_tex.c +++ b/src/compiler/nir/nir_lower_tex.c @@ -235,7 +235,7 @@ lower_rect_tex_scale(nir_builder *b, nir_tex_instr *tex) b->cursor = nir_before_instr(&tex->instr); nir_ssa_def *idx = nir_imm_int(b, tex->texture_index); - nir_ssa_def *scale = nir_build_load_texture_rect_scaling(b, 32, idx); + nir_ssa_def *scale = nir_load_texture_rect_scaling(b, 32, idx); int coord_index = nir_tex_instr_src_index(tex, nir_tex_src_coord); if (coord_index != -1) { diff --git a/src/compiler/nir/nir_split_64bit_vec3_and_vec4.c b/src/compiler/nir/nir_split_64bit_vec3_and_vec4.c index c87fe22a932..d8fb960c572 100644 --- a/src/compiler/nir/nir_split_64bit_vec3_and_vec4.c +++ b/src/compiler/nir/nir_split_64bit_vec3_and_vec4.c @@ -184,8 +184,7 @@ split_load_deref(nir_builder *b, nir_intrinsic_instr *intr, } nir_ssa_def *load1 = nir_build_load_deref(b, 2, 64, &deref1->dest.ssa, 0); - nir_ssa_def *load2 = nir_build_load_deref(b, old_components - 2, 64, - &deref2->dest.ssa, 0); + nir_ssa_def *load2 = nir_build_load_deref(b, old_components - 2, 64, &deref2->dest.ssa, 0); return merge_to_vec3_or_vec4(b, load1, load2); }