anv: Optimize genX(cmd_buffer_emit_gfx12_depth_wa)

Only emit the workaround as needed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11454>

src/intel/vulkan/anv_private.h

@@ -2967,6 +2967,12 @@ struct anv_cmd_graphics_state {
    } gfx7;
 };
 
+enum anv_depth_reg_mode {
+   ANV_DEPTH_REG_MODE_UNKNOWN = 0,
+   ANV_DEPTH_REG_MODE_HW_DEFAULT,
+   ANV_DEPTH_REG_MODE_D16,
+};
+
 /** State tracking for compute pipeline
  *
  * This has anv_cmd_pipeline_state as a base struct to track things which get
@@ -3043,6 +3049,13 @@ struct anv_cmd_state {
     */
    bool                                         hiz_enabled;
 
+   /* We ensure the registers for the gfx12 D16 fix are initalized at the
+    * first non-NULL depth stencil packet emission of every command buffer.
+    * For secondary command buffer execution, we transfer the state from the
+    * last command buffer to the primary (if known).
+    */
+   enum anv_depth_reg_mode                      depth_reg_mode;
+
    bool                                         conditional_render_enabled;
 
    /**