asahi,agx: Respect no16 even for I/O

Don't call lower_mediump_io for no16. This is helpful for debugging and soon
driconf-shaming apps with broken precision qualifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

src/asahi/compiler/agx_compile.c

@@ -2562,7 +2562,7 @@ agx_compile_function_nir(nir_shader *nir, nir_function_impl *impl,
  * lowered here to avoid duplicate work with shader variants.
  */
 void
-agx_preprocess_nir(nir_shader *nir, bool support_lod_bias,
+agx_preprocess_nir(nir_shader *nir, bool support_lod_bias, bool allow_mediump,
                    struct agx_uncompiled_shader_info *out)
 {
    if (out)
@@ -2592,7 +2592,6 @@ agx_preprocess_nir(nir_shader *nir, bool support_lod_bias,
               glsl_type_size, 0);
    NIR_PASS_V(nir, nir_lower_ssbo);
    if (nir->info.stage == MESA_SHADER_FRAGMENT) {
-      uint64_t texcoord = agx_texcoord_mask(nir);
       struct interp_masks masks = agx_interp_masks(nir);
 
       NIR_PASS_V(nir, agx_nir_lower_frag_sidefx);
@@ -2602,9 +2601,13 @@ agx_preprocess_nir(nir_shader *nir, bool support_lod_bias,
        * hardware limitation. The resulting code (with an extra f2f16 at the end
        * if needed) matches what Metal produces.
        */
-      NIR_PASS_V(nir, nir_lower_mediump_io,
-                 nir_var_shader_in | nir_var_shader_out,
-                 ~(masks.flat | texcoord), false);
+      if (likely(allow_mediump)) {
+         uint64_t texcoord = agx_texcoord_mask(nir);
+
+         NIR_PASS_V(nir, nir_lower_mediump_io,
+                    nir_var_shader_in | nir_var_shader_out,
+                    ~(masks.flat | texcoord), false);
+      }
 
       if (out) {
          out->inputs_flat_shaded = masks.flat;

src/asahi/compiler/agx_compile.h

@@ -209,6 +209,7 @@ struct agx_shader_key {
 };
 
 void agx_preprocess_nir(nir_shader *nir, bool support_lod_bias,
+                        bool allow_mediump,
                         struct agx_uncompiled_shader_info *out);
 
 bool agx_nir_lower_discard_zs_emit(nir_shader *s);

src/asahi/lib/agx_meta.c

@@ -17,7 +17,7 @@ agx_compile_meta_shader(struct agx_meta_cache *cache, nir_shader *shader,
    struct util_dynarray binary;
    util_dynarray_init(&binary, NULL);
 
-   agx_preprocess_nir(shader, false, NULL);
+   agx_preprocess_nir(shader, false, false, NULL);
    if (tib) {
       unsigned bindless_base = 0;
       agx_nir_lower_tilebuffer(shader, tib, NULL, &bindless_base, NULL);

src/gallium/drivers/asahi/agx_state.c

@@ -39,6 +39,7 @@
 #include "util/u_prim.h"
 #include "util/u_resource.h"
 #include "util/u_transfer.h"
+#include "agx_device.h"
 #include "agx_disk_cache.h"
 #include "agx_tilebuffer.h"
 #include "pool.h"
@@ -1686,7 +1687,8 @@ agx_get_shader_variant(struct agx_screen *screen,
 }
 
 static void
-agx_shader_initialize(struct agx_uncompiled_shader *so, nir_shader *nir)
+agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
+                      nir_shader *nir)
 {
    so->type = pipe_shader_type_from_mesa(nir->info.stage);
 
@@ -1709,7 +1711,8 @@ agx_shader_initialize(struct agx_uncompiled_shader *so, nir_shader *nir)
     */
    NIR_PASS_V(nir, agx_nir_lower_bindings, &so->internal_bindless);
 
-   agx_preprocess_nir(nir, true, &so->info);
+   bool allow_mediump = !(dev->debug & AGX_DBG_NO16);
+   agx_preprocess_nir(nir, true, allow_mediump, &so->info);
 
    blob_init(&so->serialized_nir);
    nir_serialize(&so->serialized_nir, nir, true);
@@ -1744,7 +1747,7 @@ agx_create_shader_state(struct pipe_context *pctx,
                                              asahi_fs_shader_key_equal);
    }
 
-   agx_shader_initialize(so, nir);
+   agx_shader_initialize(dev, so, nir);
 
    /* We're done with the NIR, throw it away */
    ralloc_free(nir);
@@ -1800,6 +1803,7 @@ static void *
 agx_create_compute_state(struct pipe_context *pctx,
                          const struct pipe_compute_state *cso)
 {
+   struct agx_device *dev = agx_device(pctx->screen);
    struct agx_uncompiled_shader *so =
       rzalloc(NULL, struct agx_uncompiled_shader);
 
@@ -1816,7 +1820,7 @@ agx_create_compute_state(struct pipe_context *pctx,
    assert(cso->ir_type == PIPE_SHADER_IR_NIR && "TGSI kernels unsupported");
    nir_shader *nir = (void *)cso->prog;
 
-   agx_shader_initialize(so, nir);
+   agx_shader_initialize(dev, so, nir);
    agx_get_shader_variant(agx_screen(pctx->screen), so, &pctx->debug, &key);
 
    /* We're done with the NIR, throw it away */