intel: Move clflush helpers from anv to common/gen_clflush.h.
I want to use these in the OpenGL driver as well. v2: Add to COMMON_FILES in Makefile.sources (caught by Emil) Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
@@ -7,6 +7,7 @@ BLORP_FILES = \
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blorp/blorp_priv.h
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COMMON_FILES = \
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common/gen_clflush.h \
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common/gen_debug.c \
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common/gen_debug.h \
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common/gen_device_info.c \
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56
src/intel/common/gen_clflush.h
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56
src/intel/common/gen_clflush.h
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@@ -0,0 +1,56 @@
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/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef GEN_CLFLUSH_H
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#define GEN_CLFLUSH_H
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#define CACHELINE_SIZE 64
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#define CACHELINE_MASK 63
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static inline void
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gen_clflush_range(void *start, size_t size)
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{
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void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
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void *end = start + size;
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while (p < end) {
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__builtin_ia32_clflush(p);
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p += CACHELINE_SIZE;
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}
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}
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static inline void
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gen_flush_range(void *start, size_t size)
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{
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__builtin_ia32_mfence();
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gen_clflush_range(start, size);
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}
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static inline void
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gen_invalidate_range(void *start, size_t size)
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{
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gen_clflush_range(start, size);
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__builtin_ia32_mfence();
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}
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#endif
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@@ -1091,7 +1091,7 @@ write_reloc(const struct anv_device *device, void *p, uint64_t v, bool flush)
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}
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if (flush && !device->info.has_llc)
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anv_flush_range(p, reloc_size);
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gen_flush_range(p, reloc_size);
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}
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static void
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@@ -1750,7 +1750,7 @@ clflush_mapped_ranges(struct anv_device *device,
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if (ranges[i].offset >= mem->map_size)
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continue;
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anv_clflush_range(mem->map + ranges[i].offset,
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gen_clflush_range(mem->map + ranges[i].offset,
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MIN2(ranges[i].size, mem->map_size - ranges[i].offset));
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}
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}
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@@ -41,6 +41,7 @@
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#define VG(x)
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#endif
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#include "common/gen_clflush.h"
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#include "common/gen_device_info.h"
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#include "blorp/blorp.h"
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#include "compiler/brw_compiler.h"
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@@ -529,35 +530,6 @@ struct anv_state_stream {
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struct anv_state_stream_block *block_list;
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};
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#define CACHELINE_SIZE 64
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#define CACHELINE_MASK 63
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static inline void
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anv_clflush_range(void *start, size_t size)
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{
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void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
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void *end = start + size;
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while (p < end) {
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__builtin_ia32_clflush(p);
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p += CACHELINE_SIZE;
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}
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}
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static inline void
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anv_flush_range(void *start, size_t size)
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{
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__builtin_ia32_mfence();
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anv_clflush_range(start, size);
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}
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static inline void
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anv_invalidate_range(void *start, size_t size)
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{
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anv_clflush_range(start, size);
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__builtin_ia32_mfence();
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}
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/* The block_pool functions exported for testing only. The block pool should
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* only be used via a state pool (see below).
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*/
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@@ -791,7 +763,7 @@ anv_state_flush(struct anv_device *device, struct anv_state state)
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if (device->info.has_llc)
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return;
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anv_flush_range(state.map, state.alloc_size);
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gen_flush_range(state.map, state.alloc_size);
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}
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void anv_device_init_blorp(struct anv_device *device);
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@@ -72,7 +72,7 @@ anv_device_submit_simple_batch(struct anv_device *device,
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memcpy(bo.map, batch->start, size);
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if (!device->info.has_llc)
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anv_flush_range(bo.map, size);
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gen_flush_range(bo.map, size);
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exec_bos[0] = &bo;
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exec2_objects[0].handle = bo.gem_handle;
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@@ -156,7 +156,7 @@ blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
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{
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struct anv_device *device = batch->blorp->driver_ctx;
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if (!device->info.has_llc)
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anv_flush_range(start, size);
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gen_flush_range(start, size);
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}
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static void
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