From 3d3e4928b27b6c3fbca12b47da5408fdbde0cb1c Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sun, 16 May 2021 14:14:49 -0400 Subject: [PATCH] agx: Add ld_vary_flat opcode Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_opcodes.py | 1 + src/asahi/compiler/agx_pack.c | 10 +++++++--- src/asahi/compiler/agx_register_allocate.c | 4 +++- 3 files changed, 11 insertions(+), 4 deletions(-) diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py index fcb4a7e49fa..f22611addfc 100644 --- a/src/asahi/compiler/agx_opcodes.py +++ b/src/asahi/compiler/agx_opcodes.py @@ -237,6 +237,7 @@ for is_float in [False, True]: op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE]) op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND]) op("ld_vary", (0x21, 0xBF, 8, _), srcs = 1, imms = [CHANNELS, PERSPECTIVE]) +op("ld_vary_flat", (0xA1, 0xBF, 8, _), srcs = 1, imms = [CHANNELS]) op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False) op("stop", (0x88, 0xFFFF, 2, _), dests = 0, can_eliminate = False) op("trap", (0x08, 0xFFFF, 2, _), dests = 0, can_eliminate = False) diff --git a/src/asahi/compiler/agx_pack.c b/src/asahi/compiler/agx_pack.c index 38b5d6ff26d..b15fb97bf56 100644 --- a/src/asahi/compiler/agx_pack.c +++ b/src/asahi/compiler/agx_pack.c @@ -398,22 +398,26 @@ agx_pack_instr(struct util_dynarray *emission, struct util_dynarray *fixups, agx } case AGX_OPCODE_LD_VARY: + case AGX_OPCODE_LD_VARY_FLAT: { + bool flat = (I->op == AGX_OPCODE_LD_VARY_FLAT); unsigned D = agx_pack_alu_dst(I->dest[0]); unsigned channels = (I->channels & 0x3); assert(I->mask < 0xF); /* 0 indicates full mask */ agx_index index_src = I->src[0]; assert(index_src.type == AGX_INDEX_IMMEDIATE); + assert(!(flat && I->perspective)); unsigned index = index_src.value; uint64_t raw = - 0x21 | (I->perspective ? (1 << 6) : 0) | + 0x21 | (flat ? (1 << 7) : 0) | + (I->perspective ? (1 << 6) : 0) | ((D & 0xFF) << 7) | (1ull << 15) | /* XXX */ (((uint64_t) index) << 16) | (((uint64_t) channels) << 30) | - (1ull << 46) | /* XXX */ - (1ull << 52) | /* XXX */ + (!flat ? (1ull << 46) : 0) | /* XXX */ + (!flat ? (1ull << 52) : 0) | /* XXX */ (((uint64_t) (D >> 8)) << 56); unsigned size = 8; diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c index 6f9b90e0194..5fe505bec8c 100644 --- a/src/asahi/compiler/agx_register_allocate.c +++ b/src/asahi/compiler/agx_register_allocate.c @@ -90,7 +90,9 @@ agx_ra(agx_context *ctx) unsigned size = ins->dest[d].size == AGX_SIZE_32 ? 2 : 1; if (size == 2 && usage & 1) usage++; unsigned v = usage; - unsigned comps = (ins->op == AGX_OPCODE_LD_VARY || ins->op == AGX_OPCODE_DEVICE_LOAD || ins->op == AGX_OPCODE_TEXTURE_SAMPLE || ins->op == AGX_OPCODE_LD_TILE) ? 4 : 1; // todo systematic + unsigned comps = (ins->op == AGX_OPCODE_LD_VARY || ins->op == AGX_OPCODE_DEVICE_LOAD || ins->op == AGX_OPCODE_TEXTURE_SAMPLE || ins->op == AGX_OPCODE_LD_TILE) ? 4 : + (ins->op == AGX_OPCODE_LD_VARY_FLAT) ? 3 : + 1; // todo systematic usage += comps * size; alloc[ins->dest[d].value] = v; ins->dest[d] = agx_replace_index(ins->dest[d], agx_register(v, ins->dest[d].size));