iris: set depth stall enabled when depth flush enabled on gen12

This implements HW workaround #1409600907 for iris driver.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3378>
This commit is contained in:
Tapani Pälli
2020-01-14 10:02:05 +02:00
parent 308efbf2f3
commit 3cec148455

View File

@@ -7161,6 +7161,15 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
flags |= PIPE_CONTROL_STALL_AT_SCOREBOARD;
}
if (GEN_GEN >= 12 && (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) {
/* GEN:BUG:1409600907:
*
* "PIPE_CONTROL with Depth Stall Enable bit must be set
* with any PIPE_CONTROL with Depth Flush Enable bit set.
*/
flags |= PIPE_CONTROL_DEPTH_STALL;
}
/* Emit --------------------------------------------------------------- */
if (INTEL_DEBUG & DEBUG_PIPE_CONTROL) {