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radv: Add sam option.

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So that people without large BAR can try this out.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9318>
This commit is contained in:
Bas Nieuwenhuizen
2021-02-27 20:16:21 +01:00
committed by Marge Bot
parent 8a60bde0cf
commit 3c9452c3ae
4 changed files with 8 additions and 4 deletions
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2
docs/envvars.rst
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@@ -636,6 +636,8 @@ RADV driver environment variables
disable optimizations that get enabled when all VRAM is CPU visible. disable optimizations that get enabled when all VRAM is CPU visible.
``pswave32`` ``pswave32``
enable wave32 for pixel shaders (GFX10+) enable wave32 for pixel shaders (GFX10+)
``sam``
enable optimizations to move more driver internal objects to VRAM.
``tccompatcmask`` ``tccompatcmask``
enable TC-compat cmask for MSAA images enable TC-compat cmask for MSAA images

8
src/amd/vulkan/radv_cmd_buffer.c
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@@ -486,10 +486,10 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
enum radeon_bo_domain enum radeon_bo_domain
radv_cmdbuffer_domain(const struct radeon_info *info, uint32_t perftest) radv_cmdbuffer_domain(const struct radeon_info *info, uint32_t perftest)
{ {
return (info->all_vram_visible && bool use_sam = (info->all_vram_visible && info->has_dedicated_vram &&
info->has_dedicated_vram && !(perftest & RADV_PERFTEST_NO_SAM)) ||
!(perftest & RADV_PERFTEST_NO_SAM)) ? (perftest & RADV_PERFTEST_SAM);
RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT; return use_sam ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT;
} }
static bool static bool

1
src/amd/vulkan/radv_debug.h
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@@ -72,6 +72,7 @@ enum {
RADV_PERFTEST_GE_WAVE_32 = 1u << 6, RADV_PERFTEST_GE_WAVE_32 = 1u << 6,
RADV_PERFTEST_DFSM = 1u << 7, RADV_PERFTEST_DFSM = 1u << 7,
RADV_PERFTEST_NO_SAM = 1u << 8, RADV_PERFTEST_NO_SAM = 1u << 8,
RADV_PERFTEST_SAM = 1u << 9,
}; };
bool bool

1
src/amd/vulkan/radv_device.c
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@@ -816,6 +816,7 @@ static const struct debug_control radv_perftest_options[] = {
{"gewave32", RADV_PERFTEST_GE_WAVE_32}, {"gewave32", RADV_PERFTEST_GE_WAVE_32},
{"dfsm", RADV_PERFTEST_DFSM}, {"dfsm", RADV_PERFTEST_DFSM},
{"nosam", RADV_PERFTEST_NO_SAM}, {"nosam", RADV_PERFTEST_NO_SAM},
{"sam", RADV_PERFTEST_SAM},
{NULL, 0} {NULL, 0}
}; };