radv: set the default workgroup size for VS as LS

This will be optimized during shader info linking if TCS is present.
The main motivation for this change is ESO because the next stage
might not exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27396>
This commit is contained in:
Samuel Pitoiset
2024-01-31 18:51:12 +01:00
committed by Marge Bot
parent 2a58bbbed8
commit 3b2452da3c

View File

@@ -1239,6 +1239,16 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
info->cs.uses_full_subgroups = pipeline_type != RADV_PIPELINE_RAY_TRACING && !nir->info.internal &&
(info->workgroup_size % info->wave_size) == 0;
break;
case MESA_SHADER_VERTEX:
if (info->vs.as_ls) {
/* Set the maximum possible value by default, this will be optimized during linking if
* possible.
*/
info->workgroup_size = 256;
} else {
info->workgroup_size = info->wave_size;
}
break;
case MESA_SHADER_TESS_CTRL:
if (gfx_state->ts.patch_control_points) {
info->workgroup_size = ac_compute_lshs_workgroup_size(
@@ -1631,12 +1641,7 @@ radv_link_shaders_info(struct radv_device *device, struct radv_shader_stage *pro
struct radv_shader_stage *vs_stage = producer;
struct radv_shader_stage *tcs_stage = consumer;
if (gfx_state->ts.patch_control_points == 0) {
/* Set the workgroup size to the maximum possible value to ensure that compilers don't
* optimize barriers.
*/
vs_stage->info.workgroup_size = 256;
} else {
if (gfx_state->ts.patch_control_points) {
vs_stage->info.workgroup_size = ac_compute_lshs_workgroup_size(
device->physical_device->rad_info.gfx_level, MESA_SHADER_VERTEX, tcs_stage->info.num_tess_patches,
gfx_state->ts.patch_control_points, tcs_stage->info.tcs.tcs_vertices_out);