ac/nir, radv, radeonsi: Switch to using ac_shader_args
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Connor Abbott
@@ -44,22 +44,6 @@ struct pipe_debug_callback;
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#define RADEON_LLVM_MAX_SYSTEM_VALUES 11
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#define RADEON_LLVM_MAX_ADDRS 16
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enum si_arg_regfile {
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ARG_SGPR,
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ARG_VGPR
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};
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/**
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* Used to collect types and other info about arguments of the LLVM function
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* before the function is created.
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*/
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struct si_function_info {
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LLVMTypeRef types[100];
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LLVMValueRef *assign[100];
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unsigned num_sgpr_params;
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unsigned num_params;
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};
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struct si_shader_output_values {
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LLVMValueRef values[4];
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unsigned semantic_name;
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@@ -82,6 +66,7 @@ struct si_shader_context {
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unsigned num_images;
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unsigned num_samplers;
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struct ac_shader_args args;
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struct ac_shader_abi abi;
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/** This function is responsible for initilizing the inputs array and will be
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@@ -123,19 +108,26 @@ struct si_shader_context {
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LLVMValueRef main_fn;
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LLVMTypeRef return_type;
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/* Parameter indices for LLVMGetParam. */
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int param_rw_buffers;
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int param_const_and_shader_buffers;
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int param_samplers_and_images;
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int param_bindless_samplers_and_images;
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struct ac_arg const_and_shader_buffers;
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struct ac_arg samplers_and_images;
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/* For merged shaders, the per-stage descriptors for the stage other
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* than the one we're processing, used to pass them through from the
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* first stage to the second.
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*/
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struct ac_arg other_const_and_shader_buffers;
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struct ac_arg other_samplers_and_images;
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struct ac_arg rw_buffers;
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struct ac_arg bindless_samplers_and_images;
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/* Common inputs for merged shaders. */
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int param_merged_wave_info;
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int param_merged_scratch_offset;
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struct ac_arg merged_wave_info;
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struct ac_arg merged_scratch_offset;
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/* API VS */
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int param_vertex_buffers;
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int param_rel_auto_id;
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int param_vs_prim_id;
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int param_vertex_index0;
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struct ac_arg vertex_buffers;
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struct ac_arg rel_auto_id;
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struct ac_arg vs_prim_id;
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struct ac_arg vertex_index0;
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/* VS states and layout of LS outputs / TCS inputs at the end
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* [0] = clamp vertex color
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* [1] = indexed
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@@ -144,12 +136,12 @@ struct si_shader_context {
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* [24:31] = stride between vertices in DW = num_inputs * 4
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* max = 32*4
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*/
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int param_vs_state_bits;
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int param_vs_blit_inputs;
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struct ac_arg vs_state_bits;
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struct ac_arg vs_blit_inputs;
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/* HW VS */
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int param_streamout_config;
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int param_streamout_write_index;
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int param_streamout_offset[4];
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struct ac_arg streamout_config;
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struct ac_arg streamout_write_index;
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struct ac_arg streamout_offset[4];
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/* API TCS & TES */
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/* Layout of TCS outputs in the offchip buffer
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@@ -161,7 +153,7 @@ struct si_shader_context {
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* [12:31] = the offset of per patch attributes in the buffer in bytes.
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* max = NUM_PATCHES*32*32*16
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*/
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int param_tcs_offchip_layout;
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struct ac_arg tcs_offchip_layout;
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/* API TCS */
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/* Offsets where TCS outputs and TCS patch outputs live in LDS:
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@@ -169,41 +161,43 @@ struct si_shader_context {
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* [16:31] = TCS output patch0 offset for per-patch / 16
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* max = (NUM_PATCHES + 1) * 32*32
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*/
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int param_tcs_out_lds_offsets;
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struct ac_arg tcs_out_lds_offsets;
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/* Layout of TCS outputs / TES inputs:
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* [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
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* max = 32*32*4 + 32*4
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* [13:18] = gl_PatchVerticesIn, max = 32
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* [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
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*/
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int param_tcs_out_lds_layout;
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int param_tcs_offchip_offset;
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int param_tcs_factor_offset;
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struct ac_arg tcs_out_lds_layout;
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struct ac_arg tcs_offchip_offset;
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struct ac_arg tcs_factor_offset;
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/* API TES */
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int param_tes_offchip_addr;
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int param_tes_u;
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int param_tes_v;
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int param_tes_rel_patch_id;
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struct ac_arg tes_offchip_addr;
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struct ac_arg tes_u;
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struct ac_arg tes_v;
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struct ac_arg tes_rel_patch_id;
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/* HW ES */
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int param_es2gs_offset;
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struct ac_arg es2gs_offset;
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/* HW GS */
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/* On gfx10:
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* - bits 0..10: ordered_wave_id
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* - bits 12..20: number of vertices in group
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* - bits 22..30: number of primitives in group
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*/
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LLVMValueRef gs_tg_info;
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struct ac_arg gs_tg_info;
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/* API GS */
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int param_gs2vs_offset;
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int param_gs_wave_id; /* GFX6 */
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LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
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int param_gs_vtx01_offset; /* in dwords (GFX9) */
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int param_gs_vtx23_offset; /* in dwords (GFX9) */
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int param_gs_vtx45_offset; /* in dwords (GFX9) */
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struct ac_arg gs2vs_offset;
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struct ac_arg gs_wave_id; /* GFX6 */
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struct ac_arg gs_vtx_offset[6]; /* in dwords (GFX6) */
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struct ac_arg gs_vtx01_offset; /* in dwords (GFX9) */
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struct ac_arg gs_vtx23_offset; /* in dwords (GFX9) */
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struct ac_arg gs_vtx45_offset; /* in dwords (GFX9) */
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/* PS */
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struct ac_arg pos_fixed_pt;
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/* CS */
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int param_block_size;
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int param_cs_user_data;
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struct ac_arg block_size;
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struct ac_arg cs_user_data;
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struct ac_llvm_compiler *compiler;
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@@ -252,14 +246,9 @@ si_shader_context_from_abi(struct ac_shader_abi *abi)
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return container_of(abi, ctx, abi);
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}
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void si_init_function_info(struct si_function_info *fninfo);
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unsigned add_arg_assign(struct si_function_info *fninfo,
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enum si_arg_regfile regfile, LLVMTypeRef type,
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LLVMValueRef *assign);
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void si_create_function(struct si_shader_context *ctx,
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const char *name,
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LLVMTypeRef *returns, unsigned num_returns,
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struct si_function_info *fninfo,
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unsigned max_workgroup_size);
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unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
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struct ac_llvm_compiler *compiler,
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@@ -287,8 +276,7 @@ void si_llvm_context_set_ir(struct si_shader_context *ctx,
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void si_llvm_create_func(struct si_shader_context *ctx,
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const char *name,
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LLVMTypeRef *return_types, unsigned num_return_elems,
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LLVMTypeRef *ParamTypes, unsigned ParamCount);
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LLVMTypeRef *return_types, unsigned num_return_elems);
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void si_llvm_dispose(struct si_shader_context *ctx);
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@@ -385,7 +373,7 @@ void si_llvm_load_input_fs(
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bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
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LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
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unsigned param, unsigned rshift,
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struct ac_arg param, unsigned rshift,
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unsigned bitwidth);
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void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
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